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DK_VIDEO_GW2A-LV18PG484C8I7_V1.2

Previous Name: DK-VIDEO-GW2A18-PG484 V1.2

DK_VIDEO_GW2A-LV18PG484C8I7_V1.2

The DK_VIDEO_GW2A-LV18PG484C8I7_V1.2 is a video-centric FPGA development board based on the GW2A Arora FPGA, designed for DDR3-based video processing and high-speed video interface evaluation.

It integrates 2 Gbit DDR3 memory and four HDMI ports supporting both RX and TX paths via FPGA IP and external decoder chips, along with LVDS TX/RX, MIPI CSI, MIPI DSI, and GPIO, providing a flexible platform for validating HDMI, LVDS, and MIPI video pipelines.

Recommended Use:

Developing and validating video processing systems that require DDR3 memory and multi-path HDMI, LVDS, and MIPI interfaces on an FPGA platform.

 

Best For:

  • HDMI RX/TX video capture and output
  • Video bridging and pipeline evaluation
  • LVDS and MIPI CSI/DSI video interfaces
  • DDR3-based video buffering and processing
  • FPGA functional verification and debugging
Documents Download
BSDL BSDL Download
Schematic Gowin Minimum FPGA System SCH Download
SCH Symbol Gowin FPGA SCH Symbol Download
Schematic DK_VIDEO_GW2A-LV18PG484C8I7_V1.2 SCH Download
User Guide DK_VIDEO_GW2A-LV18PG484C8I7_V1.2 Development Board User Guide Download
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