The DK_START_GW5AT-LV138FPG676A_V2.0 development board is designed for various applications, including high-speed data storage using DDR3, high-speed communication tests based on MIPI, LVDS, SERDES, FMC, and the evaluation of the GW5AT-138 series of FPGA functions. It is also suitable for hardware verification, software learning, and debugging. The board uses the GW5AT-LV138FPG676A FPGA device, which is a part of the Gowin GW5AT series of FPGA products. This series includes abundant internal resources, high-performance DSP with a new architecture that supports AI operations, high-speed LVDS interface, and abundant BSRAM resources. The FPGA device also integrates self-developed DDR3 and 12.5Gbps SERDES, which support multiple protocols and come in a variety of packages. With its low power consumption, high performance, and compatibility design, the Arora V FPGA products, which are manufactured using 22nm process technology, are suitable for low-cost, high-speed applications.     FEATURES   FPGA Device The development board uses the GW5AT-LV138FPG676A FPGA device, which is the fifth generation products of Gowin Arora family. Max. user I/O: 376 Download and Boot Integrate download module on the board, download through USB 2.0 cable External Flash boot The DONE light is on after loading Power External DC 12V 2A Power The POWER light is on after power on The board generates 0.9V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V power supplies The board generates power supplies required for FMC interfaces, MIPI interfaces, and SFP interfaces. Clock System 50MHz clock, 100MHz clock, 200MHz clock, programmable clock Memory Device 4Gbit DDR3 SDRAM 128Mbit Quad SPI FLASH Memory SFP/SFP+ Interface 2 compact pluggable SFP+ connectors that receives SFP or SFP+ modules MIPI Interface The interface includes 10 pairs of differential signals including 2 pairs for clock and 8 pairs for data, 34 single-ended signals, power supply, and GND. Use connector with 80 contacts and 0.5mm pitch FMC Interface 58 pairs of differential signals: 34 pairs of LA (LA00-LA33); 24 pairs of HA (HA00-HA23) 4 pairs of GTP transceivers 2 pairs of GTP transceiver reference clocks 2 pairs of external input differential reference clocks 159 GNDs and 15 power connections Use 400pin HPC FMC connector with 1.27mm pitch Differential signals of 3 lanes are channeled to the 20pin double rows with 2.00mm pitch XADC Module The interface uses 2*4pin pin The XADC differential input is designed with an anti-aliasing filter PCIe x4 Interface The overall dimension of the PCIe card conforms to the standard PCIe card electromechanical specification and can be used directly on a normal PCIe x4 slot The transceiver signals of PCIe interface are directly connected to the GTP transceivers of FPGA  Debug Module 4 Keys 4 LEDS

DK_UAC2_GW1N-LV9LQ144C7I6_V2.0 development board is embedded with GW1N-LV9LQ144 chip. It can be applied to USB 2.0 communication, microphone, SPDIF and other audio communications, 9X series of FPGA function evaluation, hardware reliability verification, and software learning and debugging, etc. The GW1N series of FPGA products are the first generation of products in the LittleBee family. They offer abundant logic resources, multiple I/O standards, embedded BSRAM, DSP, PLL, and built-in Flash. They are non-volatile FPGA products with low power, instant-on, low-cost, high-security, small size, various packages, and flexible usage. The development board has the following features: Includes two USB 2.0 interfaces and supports USB 2.0 communication. Equipped with four microphone chips, and supports IIC and IIS microphone inputs. Equipped with CS8416-CZZR and CS8406-CZZR chips, and supports SPDIF digital audio communication. Equipped with CS4344-CZZR chip, and supports the communication of stereoscopic digital audio signal converting to analog audio signal. Equipped with MAX98357AETE+T chip, and can be connected to a 3.2W Output Power into 4Ω at 5V horn for audio signal output. Supports JTAG download. Reserves GPIO interfaces, LED, and keys to facilitate user test.

DK_START_GW2AN-UV9XUG400C7I6_V1.0 development board is embedded with GW2AN-UV9XUG400 chip. It can apply to USB 1.1 communication, USB 2.0 communication, industrial Ethernet communication, 9X series FPGA function evaluation, hardware reliability verification, and software learning and debugging.   The GW2AN series of FPGA products are the first generation nonvolatile products of the Arora® family. They offer a range of comprehensive features and rich internal resources like high-speed LVDS interfaces, abundant BSRAM memory, and NOR Flash. These embedded resources combine a streamlined FPGA architecture with a 55nm process to make the GW2AN series of FPGA products suitable for high-speed, lowcost applications.   The development board has the following features: An industrial Ethernet PHY chip supporting 10M/100M industrial Ethernet communication Include one USB 1.1 interface and one USB 2.0 interface, supporting USB-to-Ethernet Communication Support JTAG download Reserve GPIO interfaces, LEDs and keys to facilitate user test        

The DK_USB2.0_GW2AR-LV18QN88PC8I7_GW1NSR-LV4CMG64PC7I6 _V3.0 development board can apply to USB 2.0 communication, USB communication test, the function evaluation of GW1NSR-4C and GW2AR-18 series of FPGA, hardware reliability verification, and software learning and debugging.   The development board uses Gowin GW2AR-LV18QN88P FPGA products, which are the first generation products of the Arora family. As a kind of SIP chips, GW2AR series of FPGA products offer a range of features and rich resources like high-performance DSP, high-speed LVDS interface and abundant BSRAM resources. These embedded resources combine a streamlined FPGA architecture with a 55nm process to make the GW2AR series of FPGA products ideal for high-speed and low-cost applications.   The development board uses Gowin GW1NSR-LV4CMG64P FPGA products, which are the first generation products of the LittleBee® family. As a kind of SIP chips, GW1NSR-LV4MG64P chip integrates GW1NS series of FPGA products and PSRAM chips. The GW1NSR series of products include GW1NSR-2C and GW1NSR-2 devices. GW1NSR-2C devices are embedded with ARM Cortex-M3 hard-core processor. In addition, the GW1NSR series of FPGA products are also embedded with USB2.0PHY, user flash, and ADC.   The development board equipped with a USB-PHY chip supports 480Mbps high-speed (HS) and 12Mbps full-speed (FS) communication; the GW2AR-LV18QN88P is externally connected to FLASH chip to store the FPGA configuration program; keys and LEDs are convenient for user debugging.

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