In order to optimize your browsing experience we uses cookies. You agree to the usage of cookies when you browsing this site.
For more information regarding cookies and the processing of your personal data please read our Privacy Policy.
I understand
inner_banner_support
SUPPORT
Listen to Your Voices and Let Us Know Your Needs
Documentation Database
IP and Reference Design
Interface/ Protocol Interface
Starter Kits and Development Boards
Back
Gowin PSRAM Memory Interface HS & HS 2CH

IP Introduction


Gowin PSRAM Memory Interface IP is a common used PSRAM interface IP, in compliance with PSRAM standard protocol. The IP includes the PSRAM MCL (Memory Controller Logic) and the corresponding PHY (Physical Interface) design. Gowin PSRAM Memory Interface IP provides users a common command interface to connect with the PSRAM chip for data access and storage.

 

Features

  • Supports PSRAM W955D8MKY-6I part number
  • Supports memory data path widths of 8, 16, 24, and 32 bits
  • Supports memory chip with x8 data width
  • Programs 16, 32, 64 or 128 burst lengths
  • The clock rate is 1:2
  • The initial latency is six clock cycles
  • Supports a fixed latency mode
  • Supports a power off option
  • Configurable drive strength
  • Configurable self-refresh area
  • Configurable refresh rate
  • Supports single-channel and two-channel operation modes
Documents Download
Reference Design Gowin_PSRAM_Memory_Interface_ HS_2CH_refDesign Download
Reference Design Gowin PSRAM Memory Interface HS RefDesign Download
User Guide Gowin PSRAM Memory Interface HS & HS 2CH IP User Guide Download
Contact Sample