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Home          Support          IP and Reference Design          Gowin PicoRV32
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Image Processing
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FP Natural Logarithm
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pll
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Signal Processing
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GoAI
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GOWIN EDID PROM IP
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GOWIN Beamforming
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Reference Design
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Gowin DVI RX
Gowin DVI TX
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Video Interface
Gowin EDP PHY IP
Gowin LVDS7:1 RX LVDS4:1 TX
Gowin LVDS7:1 LCD Controller
Starter Kits and Development Boards
DK_START_GW1AN-LV5LQ100X_V1.0
DK_LED-RxCard_GW3A-LV20UG324S_V2.0
DK_PCIE_GW5AT-LV60UG324_V1.1
DK_PCIE_GW5ART-LV15MG132P_V1.1
DK_START_GW5AR-LV25LQ144P_V1.1
DK_LED-RxCard_GW3A-LV20UG324S_V1.1
DK_START_GW3A-LV20LQ144_V1.0
DK_START_GW5A-LV25LQ144_V1.0
GoAI 3.0
BrisbaneSilicon
DK_START_GW5AT-LV60PG484A_V1.2
OneKiwi 1P5
DK_USB_GW5AT-LV60UG225_V1.1
DK_VIDEO_GW5AT-LV60UG225_V1.0
DK_USB_GW5ART-LV15MG132P_V1.1
DK_START_GW5AT-LV60PG484A_V1.1
DK_START_GW5AST-LV138FPG676A_V2.1
DK_USB_GW5AT-LV60UG225_V1.0
DK_DP_GW5AT-LV60UG225_V1.0
DK_EDP_GW5AT-LV15MG132_V1.0
DK_EDP_GW5ART-LV15MG132P_V1.0
DK_START_GW5AR-LV25UG256PC2I1_V1.0
DK_START_GW5A-LV25UG324_V1.0
DK_START_GW5AST-LV138FPG676A_V1.0
DK_Motor_GW5AS-EV25UG256C2I1_V1.1
DK_START_GW5A-LV25UG324_V2.0
DK_UAC2_GW1N-LV9LQ144C7I6_V2.1
[EOL] DK_START_GW5A-LV25UG324_V1.1
DK_START_GW2AN-UV9XUG400C7I6_V1.0
PCB Package Library
Gowin FPGA SCH Symbol
BSDL
Gowin Minimum FPGA System SCH
DK_START_GW1N-LV4LQ144C6I5_V1.1
User Guide
Schematics
DK_START_GW1N-LV9EQ144C6I5_V2.1
DK_START_GW1NS-LV4CQN48C7I6_V1.1
User Guide
Schematic
DK_START_GW5AT-LV138FPG676A_V2.0
DK_START_GW1NSR-LV4CQN48PC7I6_V1.1/ QN48GC7I6_V1.1
Schematic
DK_START_GW1NR-LV9LQ144PC6I5_V3.1
Schematic
User Guide
DK_START_GW1NZ-LV1FN32C6I5_V3.1
User Guide
Schematics
DK_START_GW2A-LV18PG256C8I7_V2.0
User Guide
Demo
Schematic
DK_START_GW2A-LV55PG484C8I7_V1.3
Schematic
User Guide
DK_START_GW2AR-LV18EQ144PC8I7_V1.1
Schematic
User Guide
DK_VIDEO_GW2A-LV18PG484C8I7_V1.2
Schematic
User Guide
DK_Motor_GW2A-LV55PG484C8I7_V3.0
GoAI 2.0
TEC0117
Ethernet MII Test Program
DK_USB2.0_GW2AR-LV18QN88PC8I7_GW1NSR-LV4CMG64PC7I6_V3.0
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GOWIN MCU Designer
Type-C PD
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Gowin PicoRV32

Gowin_PicoRV32 includes PicoRV32 core, instruction memory, data memory, simple UART, and Wishbone bus peripheral devices.

 

  •  Gowin PicoRV32 CORE is a microcontroller core with risc-v architecture.
  • ILM is instruction register. DLM is data register.
  • Simple UART is a configurable simple UART.
  • Wishbone Bus connects PicoRV32 Core and peripherals of Wishbone Bus interface, which include UART, I2C Master, SPI Master, SPI Slave and Wishbone Bus extension interfaces.
Documents Download
User Guide Gowin PicoRV32 Quick Design Reference Manual Download
User Guide Gowin PicoRV32 Hardware Design Reference Manual Download
User Guide Gowin PicoRV32 Software Download Reference Manual Download
User Guide Gowin PicoRV32 IDE Software Reference Manual Download
Release Note Gowin PicoRV32 Software and Hardware Reference Design Release Note Download
Development Tool Gowin PicoRV32 Download
Contact Sample