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PRODUCTS
Low Power, High Performance, High Reliability
ARORA®
Arora® Family is designed to offer the best-in-class performance cost ratio FPGA. With abundant logic, high-performance DSP resources and high speed I/O, the family is optimized for co-processing to offload the application processor on intensive computation tasks. The Arora® family is also the first FPGA with embedded pSRAM in the industry, which gives customers more usable device I/O.
Features
- Lower Power Consumption
- 55nm SRAM technology
- Core voltage: 1.0V
- Clock dynamically turning on/ turning off
- Multiple I/O Standards
- LVCMOS33/25/18/15/12;LVTTL33,SSTL33/25/18 I, II, SSTL15; HSTL18 I, II, HSTL15 I;PCI, LVDS25, RSDS, LVDS25E, BLVDSE, MLVDSE, LVPECLE, RSDSE
- Input hysteresis option
- Supports 4mA, 8mA, 16mA, 24mA,etc. drive options
- Slew Rate option
- Output drive strength option
- Individual Bus Keeper, Weak Pull-up, Weak Pull-down, and Open Drain option
- Hot Socket
- High Performance DSP
- High performance digital signal processing ability
- Supports 9 x 9,18 x 18,36 x 36bit multiplier and 54bit accumulator;
- Multiplier cascading
- Registers pipeline and bypass
- Adaptive filtering through signal feedback
- Supports barrel shifter
- Abundant Slices
- 4 input LUT (LUT4)
- Double-edge flip-flops
- Supports shift register and distributed register Block SRAM with Multiple Modes
- Supports Dual Port, Single Port, and Semi Dual Port
- Supports bytes write enable Flexible PLLs+DLLs
- Frequency adjustment (multiply and division) and phase adjustment
- Supports global clock Configuration
- JTAG configuration
- 6 GowinCONFIG configuration modes: AUTOBOOT, SSPI, MSPI, CPU, SERIAL, DUAL BOOT
- Data stream file encryption and security bit settings
GW2A Family Table
| Device | GW2A-18 | GW2A-55 |
| LUT4 | 20,736 | 54,720 |
| Flip-Flop (FF) | 15,552 | 41,040 |
| Shadow SRAM S-SRAM(bits) | 41,472 | 109,440 |
| Block SRAM B-SRAM(bits) | 828K | 2,520K |
| Number of B-SRAM | 46 | 140 |
| 18 x 18 Multiplier | 48 | 40 |
| PLLs+DLLs | 4²+4 | 6+4 |
| I/O Bank Number | 8 | 8 |
| Max. User I/O | 319 | 607 |
| Core voltage | 1.0V | 1.0V |
Package Options and Max I/O (* Refer to the latest datasheet for details)
| Package | Pitch (mm) |
Size(mm) |
E-pad size (mm) | GW2A-18 | GW2A-55 |
| QN88 | 0.4 | 10 x 10 | 66(22) | ||
| LQ144 | 0.5 | 22 x 22 | 119(34) | - | |
| EQ144 | 0.5 | 22 x 22 | 9.74 x 9.74 | 119(34) | - |
| MG196 | 0.5 | 8 x 8 | 114(39) | ||
| PG256 | 1.0 | 17 x 17 | 207(73) | - | |
| PG256S | 1.0 | 17 x 17 | 192(72) | ||
| PG256C | 1.0 | 17 x 17 | 190(64) | ||
| PG484 | 1.0 | 23 x 23 | 319(77) | 319(75) | |
| PG1156 | 1.0 | 35 x 35 | - | 607(96) |
GW2AR Family Table
| Device | GW2AR-18 |
| LUT4 | 20,736 |
| Flip-Flop (FF) | 15,552 |
| Shadow SRAM S-SRAM(bits) | 41,472 |
| Block SRAM B-SRAM(bits) | 828K |
| Number of B-SRAM | 46 |
| pSRAM(bits) | 64M |
| DDR SDRAM (LQ176 pkg only) | 128M |
| 18 x 18 Multiplier | 48 |
| PLLs+DLLs | 4+4 |
| I/O Bank Number | 8 |
| Max. User I/O | 140 |
| Core voltage | 1.0V |
| Package | Device | Memory | PLL |
| LQ144 | GW2AR-18 | SDR SDRAM | PLLL0/PLLL1/PLLR0/PLLR1 |
| EQ144 | GW2AR-18 |
SDR SDRAM PSRAM |
PLLL0/PLLL1/PLLR0/PLLR1 |
| QN88 | GW2AR-18 |
SDR SDRAM PSRAM |
PLLL1/PLLR1 |
| LQ144 | GW2AR-18 | DDR SDRAM | PLLL1/PLLR0/PLLR1 |
| EQ176 | GW2AR-18 | DDR SDRAM | PLLL1/PLLR0/PLLR1 |
Package Options and Max I/O (* Refer to the latest datasheet for details)
GW2AR-18
| Package | Pitch (mm) | Size(mm) | E-PAD Size (mm) | GW2AR-18 |
| LQ144 | 0.5 | 22 x 22 | - | 120(35) |
| EQ144 | 0.5 | 22 x 22 | 9.74 x 9.74 | 120(35) |
| QN88 | 0.4 | 10 x 10 | - | 66(22) |
| LQ176 | 0.4 | 22 x 22 | - | 140(45) |
| EQ176 | 0.4 | 22 x 22 | 6 X 6 | 140(45) |
Coming Soon.