Synthesis Messages

Report Title GowinSynthesis Report
Design File D:\Gowin\Gowin_V1.9.12.02_x64\IDE\ipcore\SDIEncoder\data\sdi_encoder_top.v
D:\Gowin\Gowin_V1.9.12.02_x64\IDE\ipcore\SDIEncoder\data\sdi_encoder_wrapper.v
GowinSynthesis Constraints File ---
Tool Version V1.9.12.02 (64-bit)
Part Number GW5AT-LV60PG484AES
Device GW5AT-60
Device Version B
Created Time Thu Mar 12 14:38:30 2026
Legal Announcement Copyright (C)2014-2026 Gowin Semiconductor Corporation. ALL rights reserved.

Synthesis Details

Top Level Module SDI_Encoder_Top
Synthesis Process Running parser:
    CPU time = 0h 0m 0.468s, Elapsed time = 0h 0m 0.495s, Peak memory usage = 102.867MB
Running netlist conversion:
    CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.064s, Peak memory usage = 102.867MB
Running device independent optimization:
    Optimizing Phase 0: CPU time = 0h 0m 0.5s, Elapsed time = 0h 0m 0.496s, Peak memory usage = 102.867MB
    Optimizing Phase 1: CPU time = 0h 0m 0.171s, Elapsed time = 0h 0m 0.177s, Peak memory usage = 102.867MB
    Optimizing Phase 2: CPU time = 0h 0m 0.421s, Elapsed time = 0h 0m 0.428s, Peak memory usage = 102.867MB
Running inference:
    Inferring Phase 0: CPU time = 0h 0m 0.187s, Elapsed time = 0h 0m 0.176s, Peak memory usage = 102.867MB
    Inferring Phase 1: CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.077s, Peak memory usage = 102.867MB
    Inferring Phase 2: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.037s, Peak memory usage = 102.867MB
    Inferring Phase 3: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.018s, Peak memory usage = 102.867MB
Running technical mapping:
    Tech-Mapping Phase 0: CPU time = 0h 0m 0.546s, Elapsed time = 0h 0m 0.542s, Peak memory usage = 102.867MB
    Tech-Mapping Phase 1: CPU time = 0h 0m 0.109s, Elapsed time = 0h 0m 0.113s, Peak memory usage = 102.867MB
    Tech-Mapping Phase 2: CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.068s, Peak memory usage = 102.867MB
    Tech-Mapping Phase 3: CPU time = 0h 0m 8s, Elapsed time = 0h 0m 8s, Peak memory usage = 122.961MB
    Tech-Mapping Phase 4: CPU time = 0h 0m 0.328s, Elapsed time = 0h 0m 0.396s, Peak memory usage = 122.961MB
Generate output files:
    CPU time = 0h 0m 0.296s, Elapsed time = 0h 0m 0.315s, Peak memory usage = 129.836MB
Total Time and Memory Usage CPU time = 0h 0m 11s, Elapsed time = 0h 0m 11s, Peak memory usage = 129.836MB

Resource

Resource Usage Summary

Resource Usage
I/O Port 376
I/O Buf 323
    IBUF 184
    OBUF 139
Register 3360
    DFFRE 12
    DFFPE 10
    DFFCE 3338
LUT 3112
    LUT2 492
    LUT3 889
    LUT4 1731
MUX 72
    MUX2 72
ALU 179
    ALU 179
INV 16
    INV 16
BSRAM 16
    SDPB 4
    SDPX9B 12

Resource Utilization Summary

Resource Usage Utilization
Logic 3379(3200 LUT, 179 ALU) / 59904 6%
Register 3360 / 60780 6%
  --Register as Latch 0 / 60780 0%
  --Register as FF 3360 / 60780 6%
BSRAM 16 / 118 14%

Timing

Clock Summary:

NO. Clock Name Type Period Frequency(MHz) Rise Fall Source Master Object
1 I_clk Base 10.000 100.000 0.000 5.000 I_clk_ibuf/I
2 I_drp_clk Base 10.000 100.000 0.000 5.000 I_drp_clk_ibuf/I

Max Frequency Summary:

NO. Clock Name Constraint Actual Fmax Logic Level Entity
1 I_clk 100.000(MHz) 109.658(MHz) 12 TOP
2 I_drp_clk 100.000(MHz) 197.487(MHz) 7 TOP

Detail Timing Paths Information

Path 1

Path Summary:
Slack 0.881
Data Arrival Time 9.399
Data Required Time 10.280
From sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1
To sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_0_s0
Launch Clk I_clk[R]
Latch Clk I_clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 active clock edge time
0.000 0.000 I_clk
0.000 0.000 tCL RR 1 I_clk_ibuf/I
0.000 0.000 tINS RR 3329 I_clk_ibuf/O
0.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/CLK
0.682 0.344 tC2Q RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/Q
1.019 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/I0
1.493 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/F
1.830 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/I1
2.295 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/F
2.632 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/I1
3.097 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/F
3.435 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/I1
3.899 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/F
4.237 0.337 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/I0
4.737 0.501 tINS RF 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/COUT
4.737 0.000 tNET FF 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/CIN
4.782 0.045 tINS FR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/COUT
4.782 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/CIN
4.827 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/COUT
4.827 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/CIN
4.872 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/COUT
4.872 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/CIN
5.092 0.219 tINS RR 3 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/SUM
5.429 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/I1
5.894 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/F
6.231 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/I1
6.696 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/F
7.034 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/I0
7.507 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/F
7.845 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/I1
8.309 0.465 tINS RR 5 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/F
8.647 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s81/I2
9.062 0.415 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s81/F
9.399 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_0_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 10.000 active clock edge time
10.000 0.000 I_clk
10.000 0.000 tCL RR 1 I_clk_ibuf/I
10.000 0.000 tINS RR 3329 I_clk_ibuf/O
10.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_0_s0/CLK
10.280 -0.057 tSu 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_0_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%
Arrival Data Path Delay: cell: 5.005, 55.233%; route: 3.713, 40.968%; tC2Q: 0.344, 3.799%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%

Path 2

Path Summary:
Slack 0.881
Data Arrival Time 9.399
Data Required Time 10.280
From sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1
To sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_1_s0
Launch Clk I_clk[R]
Latch Clk I_clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 active clock edge time
0.000 0.000 I_clk
0.000 0.000 tCL RR 1 I_clk_ibuf/I
0.000 0.000 tINS RR 3329 I_clk_ibuf/O
0.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/CLK
0.682 0.344 tC2Q RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/Q
1.019 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/I0
1.493 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/F
1.830 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/I1
2.295 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/F
2.632 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/I1
3.097 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/F
3.435 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/I1
3.899 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/F
4.237 0.337 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/I0
4.737 0.501 tINS RF 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/COUT
4.737 0.000 tNET FF 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/CIN
4.782 0.045 tINS FR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/COUT
4.782 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/CIN
4.827 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/COUT
4.827 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/CIN
4.872 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/COUT
4.872 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/CIN
5.092 0.219 tINS RR 3 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/SUM
5.429 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/I1
5.894 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/F
6.231 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/I1
6.696 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/F
7.034 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/I0
7.507 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/F
7.845 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/I1
8.309 0.465 tINS RR 5 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/F
8.647 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n162_s83/I2
9.062 0.415 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n162_s83/F
9.399 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_1_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 10.000 active clock edge time
10.000 0.000 I_clk
10.000 0.000 tCL RR 1 I_clk_ibuf/I
10.000 0.000 tINS RR 3329 I_clk_ibuf/O
10.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_1_s0/CLK
10.280 -0.057 tSu 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_1_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%
Arrival Data Path Delay: cell: 5.005, 55.233%; route: 3.713, 40.968%; tC2Q: 0.344, 3.799%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%

Path 3

Path Summary:
Slack 0.881
Data Arrival Time 9.399
Data Required Time 10.280
From sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1
To sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_3_s0
Launch Clk I_clk[R]
Latch Clk I_clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 active clock edge time
0.000 0.000 I_clk
0.000 0.000 tCL RR 1 I_clk_ibuf/I
0.000 0.000 tINS RR 3329 I_clk_ibuf/O
0.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/CLK
0.682 0.344 tC2Q RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/Q
1.019 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/I0
1.493 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/F
1.830 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/I1
2.295 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/F
2.632 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/I1
3.097 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/F
3.435 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/I1
3.899 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/F
4.237 0.337 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/I0
4.737 0.501 tINS RF 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/COUT
4.737 0.000 tNET FF 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/CIN
4.782 0.045 tINS FR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/COUT
4.782 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/CIN
4.827 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/COUT
4.827 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/CIN
4.872 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/COUT
4.872 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/CIN
5.092 0.219 tINS RR 3 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/SUM
5.429 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/I1
5.894 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/F
6.231 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/I1
6.696 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/F
7.034 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/I0
7.507 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/F
7.845 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/I1
8.309 0.465 tINS RR 5 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/F
8.647 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n160_s83/I2
9.062 0.415 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n160_s83/F
9.399 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_3_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 10.000 active clock edge time
10.000 0.000 I_clk
10.000 0.000 tCL RR 1 I_clk_ibuf/I
10.000 0.000 tINS RR 3329 I_clk_ibuf/O
10.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_3_s0/CLK
10.280 -0.057 tSu 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_3_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%
Arrival Data Path Delay: cell: 5.005, 55.233%; route: 3.713, 40.968%; tC2Q: 0.344, 3.799%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%

Path 4

Path Summary:
Slack 0.881
Data Arrival Time 9.399
Data Required Time 10.280
From sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1
To sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_5_s0
Launch Clk I_clk[R]
Latch Clk I_clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 active clock edge time
0.000 0.000 I_clk
0.000 0.000 tCL RR 1 I_clk_ibuf/I
0.000 0.000 tINS RR 3329 I_clk_ibuf/O
0.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/CLK
0.682 0.344 tC2Q RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/Q
1.019 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/I0
1.493 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/F
1.830 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/I1
2.295 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/F
2.632 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/I1
3.097 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/F
3.435 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/I1
3.899 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/F
4.237 0.337 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/I0
4.737 0.501 tINS RF 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/COUT
4.737 0.000 tNET FF 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/CIN
4.782 0.045 tINS FR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/COUT
4.782 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/CIN
4.827 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/COUT
4.827 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/CIN
4.872 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/COUT
4.872 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/CIN
5.092 0.219 tINS RR 3 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/SUM
5.429 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/I1
5.894 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/F
6.231 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/I1
6.696 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/F
7.034 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/I0
7.507 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/F
7.845 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/I1
8.309 0.465 tINS RR 5 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/F
8.647 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n158_s85/I2
9.062 0.415 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n158_s85/F
9.399 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_5_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 10.000 active clock edge time
10.000 0.000 I_clk
10.000 0.000 tCL RR 1 I_clk_ibuf/I
10.000 0.000 tINS RR 3329 I_clk_ibuf/O
10.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_5_s0/CLK
10.280 -0.057 tSu 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_5_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%
Arrival Data Path Delay: cell: 5.005, 55.233%; route: 3.713, 40.968%; tC2Q: 0.344, 3.799%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%

Path 5

Path Summary:
Slack 1.060
Data Arrival Time 9.220
Data Required Time 10.280
From sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1
To sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_4_s0
Launch Clk I_clk[R]
Latch Clk I_clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 active clock edge time
0.000 0.000 I_clk
0.000 0.000 tCL RR 1 I_clk_ibuf/I
0.000 0.000 tINS RR 3329 I_clk_ibuf/O
0.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/CLK
0.682 0.344 tC2Q RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.rq2_wptr_3_s1/Q
1.019 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/I0
1.493 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_3_s1/F
1.830 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/I1
2.295 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_2_s0/F
2.632 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/I1
3.097 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_1_s0/F
3.435 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/I1
3.899 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/Equal.wcount_r_0_s0/F
4.237 0.337 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/I0
4.737 0.501 tINS RF 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_0_s/COUT
4.737 0.000 tNET FF 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/CIN
4.782 0.045 tINS FR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_1_s/COUT
4.782 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/CIN
4.827 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_2_s/COUT
4.827 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/CIN
4.872 0.045 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_3_s/COUT
4.872 0.000 tNET RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/CIN
5.092 0.219 tINS RR 3 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/tx_hd_audio_fifo_phase/store_rd_num_4_s/SUM
5.429 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/I1
5.894 0.465 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n70_s4/F
6.231 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/I1
6.696 0.465 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s90/F
7.034 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/I0
7.507 0.474 tINS RR 2 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n164_s88/F
7.845 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/I1
8.309 0.465 tINS RR 5 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n163_s83/F
8.647 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n159_s83/I3
8.883 0.236 tINS RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/n159_s83/F
9.220 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_4_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 10.000 active clock edge time
10.000 0.000 I_clk
10.000 0.000 tCL RR 1 I_clk_ibuf/I
10.000 0.000 tINS RR 3329 I_clk_ibuf/O
10.337 0.337 tNET RR 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_4_s0/CLK
10.280 -0.057 tSu 1 sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_sd_audio_wrapper_inst/tx_sd_audio_data_embad_inst/rd_statue_4_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 12
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%
Arrival Data Path Delay: cell: 4.826, 54.332%; route: 3.713, 41.793%; tC2Q: 0.344, 3.875%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.337, 100.000%