Timing Messages
| Report Title | Timing Analysis Report |
| Design File | E:\Gowin_Board_5at_SDI\DK_START_GW5AT-LV60PG484A_V1.1\Q_V1.1_new\Gowin_SDI_RefDesign_2600202_60k484_v1.1_sdi1_l2_cpll_ref\project\impl\gwsynthesis\dk_video.vg |
| Physical Constraints File | E:\Gowin_Board_5at_SDI\DK_START_GW5AT-LV60PG484A_V1.1\Q_V1.1_new\Gowin_SDI_RefDesign_2600202_60k484_v1.1_sdi1_l2_cpll_ref\project\src\dk_video.cst |
| Timing Constraint File | E:\Gowin_Board_5at_SDI\DK_START_GW5AT-LV60PG484A_V1.1\Q_V1.1_new\Gowin_SDI_RefDesign_2600202_60k484_v1.1_sdi1_l2_cpll_ref\project\src\dk_video.sdc |
| Tool Version | V1.9.12.02 (64-bit) |
| Part Number | GW5AT-LV60PG484AES |
| Device | GW5AT-60 |
| Device Version | B |
| Created Time | Wed Mar 25 10:20:11 2026 |
| Legal Announcement | Copyright (C)2014-2026 Gowin Semiconductor Corporation. All rights reserved. |
Timing Summaries
STA Tool Run Summary:
| Setup Delay Model | Slow 0.873V 0C ES |
| Hold Delay Model | Fast 0.927V 85C ES |
| Numbers of Paths Analyzed | 25699 |
| Numbers of Endpoints Analyzed | 27511 |
| Numbers of Falling Endpoints | 13 |
| Numbers of Setup Violated Endpoints | 0 |
| Numbers of Hold Violated Endpoints | 0 |
Clock Summary:
| NO. | Clock Name | Type | Period | Frequency(MHz) | Rise | Fall | Source | Master | Objects |
|---|---|---|---|---|---|---|---|---|---|
| 1 | sclk | Base | 20.000 | 50.000 | 0.000 | 10.000 | sclk | ||
| 2 | I_pcm2706_bclk | Base | 325.520 | 3.072 | 0.000 | 162.760 | I_pcm2706_bclk | ||
| 3 | I_audio_refclk | Base | 81.380 | 12.288 | 0.000 | 40.690 | I_audio_refclk | ||
| 4 | sdi_phy_drp_clk | Base | 15.625 | 64.000 | 0.000 | 7.812 | sdi_phy_drp_clk | ||
| 5 | sdi_phy_tx_clk | Base | 13.468 | 74.250 | 0.000 | 6.734 | sdi_phy_tx_clk | ||
| 6 | sdi_phy_rx_clk | Base | 13.468 | 74.250 | 0.000 | 6.734 | sdi_phy_rx_clk | ||
| 7 | Gowin_OSC_inst/osc_inst/OSCOUT.default_clk | Base | 47.619 | 21.000 | 0.000 | 23.810 | Gowin_OSC_inst/osc_inst/OSCOUT | ||
| 8 | I_clk_p | Base | 5.000 | 200.000 | 0.000 | 2.500 | IB_clk_inst/I | ||
| 9 | adv7513_pll_inst/u_pll/PLLA_inst/CLKOUT0.default_gen_clk | Generated | 13.468 | 74.250 | 5.050 | 11.785 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK | sdi_phy_rx_clk | adv7513_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 10 | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk | Generated | 325.520 | 3.072 | 0.000 | 162.760 | I_audio_refclk_ibuf/I | I_audio_refclk | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT |
Max Frequency Summary:
| NO. | Clock Name | Constraint | Actual Fmax | Logic Level | Entity |
|---|---|---|---|---|---|
| 1 | sclk | 50.000(MHz) | 170.366(MHz) | 6 | TOP |
| 2 | sdi_phy_drp_clk | 64.000(MHz) | 183.200(MHz) | 4 | TOP |
| 3 | sdi_phy_tx_clk | 74.250(MHz) | 127.202(MHz) | 12 | TOP |
| 4 | sdi_phy_rx_clk | 74.250(MHz) | 122.715(MHz) | 12 | TOP |
| 5 | Gowin_OSC_inst/osc_inst/OSCOUT.default_clk | 21.000(MHz) | 198.545(MHz) | 7 | TOP |
| 6 | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk | 3.072(MHz) | 237.322(MHz) | 6 | TOP |
No timing paths to get frequency of I_pcm2706_bclk!
No timing paths to get frequency of I_audio_refclk!
No timing paths to get frequency of I_clk_p!
No timing paths to get frequency of adv7513_pll_inst/u_pll/PLLA_inst/CLKOUT0.default_gen_clk!
Total Negative Slack Summary:
| Clock Name | Analysis Type | Endpoints TNS | Number of Endpoints |
|---|---|---|---|
| sclk | Setup | 0.000 | 0 |
| sclk | Hold | 0.000 | 0 |
| I_pcm2706_bclk | Setup | 0.000 | 0 |
| I_pcm2706_bclk | Hold | 0.000 | 0 |
| I_audio_refclk | Setup | 0.000 | 0 |
| I_audio_refclk | Hold | 0.000 | 0 |
| sdi_phy_drp_clk | Setup | 0.000 | 0 |
| sdi_phy_drp_clk | Hold | 0.000 | 0 |
| sdi_phy_tx_clk | Setup | 0.000 | 0 |
| sdi_phy_tx_clk | Hold | 0.000 | 0 |
| sdi_phy_rx_clk | Setup | 0.000 | 0 |
| sdi_phy_rx_clk | Hold | 0.000 | 0 |
| Gowin_OSC_inst/osc_inst/OSCOUT.default_clk | Setup | 0.000 | 0 |
| Gowin_OSC_inst/osc_inst/OSCOUT.default_clk | Hold | 0.000 | 0 |
| I_clk_p | Setup | 0.000 | 0 |
| I_clk_p | Hold | 0.000 | 0 |
| adv7513_pll_inst/u_pll/PLLA_inst/CLKOUT0.default_gen_clk | Setup | 0.000 | 0 |
| adv7513_pll_inst/u_pll/PLLA_inst/CLKOUT0.default_gen_clk | Hold | 0.000 | 0 |
| i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk | Setup | 0.000 | 0 |
| i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk | Hold | 0.000 | 0 |
Timing Details
Path Slacks Table:
Setup Paths Table
Report Command:report_timing -setup -max_paths 25 -max_common_paths 1
| Path Number | Path Slack | From Node | To Node | From Clock | To Clock | Relation | Clock Skew | Data Delay |
|---|---|---|---|---|---|---|---|---|
| 1 | 5.319 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0/Q | vesa_vs_s1/CE | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 13.468 | -0.008 | 7.877 |
| 2 | 5.445 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0/Q | vesa_vs_s1/D | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 13.468 | -0.008 | 7.974 |
| 3 | 5.606 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_2_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.787 |
| 4 | 5.606 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_3_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.787 |
| 5 | 5.606 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_7_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.787 |
| 6 | 5.606 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_8_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.787 |
| 7 | 5.606 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_9_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.787 |
| 8 | 5.606 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_10_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.787 |
| 9 | 5.615 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_4_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.778 |
| 10 | 5.800 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_11_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.594 |
| 11 | 5.800 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_12_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 7.594 |
| 12 | 5.831 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_1_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.008 | 7.571 |
| 13 | 5.860 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_5_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.008 | 7.542 |
| 14 | 5.860 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_6_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.008 | 7.542 |
| 15 | 6.253 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_0_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.000 | 7.157 |
| 16 | 6.264 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_6_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | -0.008 | 7.155 |
| 17 | 6.410 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_76_s1/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_9_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | -0.008 | 7.009 |
| 18 | 6.424 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.008 | 6.978 |
| 19 | 6.524 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_5_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | -0.008 | 6.895 |
| 20 | 6.588 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_3_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.000 | 6.823 |
| 21 | 6.604 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_en_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.008 | 6.651 |
| 22 | 6.637 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_1_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.000 | 6.774 |
| 23 | 6.742 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_1_s1/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_8_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.008 | 6.660 |
| 24 | 6.773 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_4_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | -0.008 | 6.647 |
| 25 | 6.826 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_0_s0/D | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 13.468 | 0.017 | 6.568 |
Hold Paths Table
Report Command:report_timing -hold -max_paths 25 -max_common_paths 1
| Path Number | Path Slack | From Node | To Node | From Clock | To Clock | Relation | Clock Skew | Data Delay |
|---|---|---|---|---|---|---|---|---|
| 1 | 0.040 | sdi_audio_buffer_pro_rx_inst/wr_data_42_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[10] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.181 | 0.254 |
| 2 | 0.040 | sdi_audio_buffer_pro_rx_inst/wr_data_41_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[9] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.181 | 0.254 |
| 3 | 0.043 | sdi_audio_buffer_pro_rx_inst/wr_data_24_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[8] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 4 | 0.043 | sdi_audio_buffer_pro_rx_inst/wr_data_36_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[4] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 5 | 0.043 | sdi_audio_buffer_pro_rx_inst/wr_data_35_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[3] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 6 | 0.043 | sdi_audio_buffer_pro_rx_inst/wr_data_34_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[2] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 7 | 0.043 | sdi_audio_buffer_pro_rx_inst/wr_data_33_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[1] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 8 | 0.043 | sdi_audio_buffer_pro_rx_inst/wr_data_8_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[8] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 9 | 0.043 | sdi_audio_buffer_pro_rx_inst/wr_data_5_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[5] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 10 | 0.043 | sdi_audio_buffer_pro_tx_inst/wr_data_37_s1/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[5] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 11 | 0.043 | sdi_audio_buffer_pro_tx_inst/wr_data_35_s1/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[3] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.254 |
| 12 | 0.046 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_1_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[2] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.256 |
| 13 | 0.047 | sdi_audio_buffer_pro_rx_inst/wr_data_31_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[15] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.174 | 0.254 |
| 14 | 0.047 | sdi_audio_buffer_pro_rx_inst/wr_data_28_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[12] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.174 | 0.254 |
| 15 | 0.047 | sdi_audio_buffer_pro_rx_inst/wr_data_27_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[11] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.174 | 0.254 |
| 16 | 0.047 | sdi_audio_buffer_pro_rx_inst/wr_data_26_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[10] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.174 | 0.254 |
| 17 | 0.047 | sdi_audio_buffer_pro_rx_inst/wr_data_10_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[10] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.174 | 0.254 |
| 18 | 0.047 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_5_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[6] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.257 |
| 19 | 0.047 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_4_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[5] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.257 |
| 20 | 0.048 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_7_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[8] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.258 |
| 21 | 0.061 | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_5_s0/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/ADB[10] | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk:[R] | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk:[R] | 0.000 | -0.174 | 0.266 |
| 22 | 0.080 | sdi_audio_buffer_pro_rx_inst/wr_data_0_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[0] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.177 | 0.291 |
| 23 | 0.084 | sdi_audio_buffer_pro_rx_inst/wr_data_14_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[14] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.174 | 0.291 |
| 24 | 0.084 | sdi_audio_buffer_pro_rx_inst/wr_data_13_s1/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[13] | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.174 | 0.291 |
| 25 | 0.105 | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/datas2_d1_3_s0/Q | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/tx_hd_lbdl_sdpb_inst1/sdpx9b_inst_5/DI[4] | sdi_phy_tx_clk:[R] | sdi_phy_tx_clk:[R] | 0.000 | -0.174 | 0.312 |
Recovery Paths Table
Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1
| Path Number | Path Slack | From Node | To Node | From Clock | To Clock | Relation | Clock Skew | Data Delay |
|---|---|---|---|---|---|---|---|---|
| 1 | 1.024 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[F] | 6.734 | 0.447 | 5.001 |
| 2 | 1.024 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[F] | 6.734 | 0.447 | 5.001 |
| 3 | 1.416 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[F] | 6.734 | 0.018 | 5.037 |
| 4 | 1.422 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[F] | 6.734 | 0.018 | 5.030 |
| 5 | 4.197 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_2_s/RESET | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 2.458 |
| 6 | 4.366 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_0_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 2.040 |
| 7 | 4.366 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_3_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 2.040 |
| 8 | 4.366 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_0_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 2.040 |
| 9 | 4.366 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_2_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 2.040 |
| 10 | 4.366 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_0_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 2.040 |
| 11 | 4.366 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_2_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 2.040 |
| 12 | 4.370 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_2_s/RESET | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | -0.001 | 2.293 |
| 13 | 4.547 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_4_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 1.858 |
| 14 | 4.547 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_4_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.016 | 1.858 |
| 15 | 4.555 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_2_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.858 |
| 16 | 4.555 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_3_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.858 |
| 17 | 4.555 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_5_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.858 |
| 18 | 4.555 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_3_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.858 |
| 19 | 4.555 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_5_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.858 |
| 20 | 4.753 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Empty_s0/PRESET | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | -0.001 | 1.669 |
| 21 | 4.753 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_6_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | -0.001 | 1.669 |
| 22 | 4.753 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_6_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | -0.001 | 1.669 |
| 23 | 4.875 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_0_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.539 |
| 24 | 4.875 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_1_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.539 |
| 25 | 4.875 | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_4_s0/CLEAR | sdi_phy_tx_clk:[F] | sdi_phy_tx_clk:[R] | 6.734 | 0.007 | 1.539 |
Removal Paths Table
Report Command:report_timing -removal -max_paths 25 -max_common_paths 1
| Path Number | Path Slack | From Node | To Node | From Clock | To Clock | Relation | Clock Skew | Data Delay |
|---|---|---|---|---|---|---|---|---|
| 1 | 0.467 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s1/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.007 | 0.427 |
| 2 | 0.475 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_19_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_9_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.427 |
| 3 | 0.526 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s1/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.004 | 0.482 |
| 4 | 0.526 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.004 | 0.482 |
| 5 | 0.546 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s1/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.499 |
| 6 | 0.549 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s1/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.501 |
| 7 | 0.558 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.510 |
| 8 | 0.564 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_12_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_2_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.004 | 0.520 |
| 9 | 0.568 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.520 |
| 10 | 0.568 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s1/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.520 |
| 11 | 0.571 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.524 |
| 12 | 0.571 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_17_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_7_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.004 | 0.520 |
| 13 | 0.573 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.004 | 0.522 |
| 14 | 0.582 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s1/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.000 | 0.535 |
| 15 | 0.602 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | -0.004 | 0.558 |
| 16 | 0.638 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/mem_cnt_1_s3/CLEAR | sclk:[R] | sclk:[R] | 0.000 | 0.000 | 0.590 |
| 17 | 0.638 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/mem_cnt_2_s1/CLEAR | sclk:[R] | sclk:[R] | 0.000 | 0.000 | 0.590 |
| 18 | 0.649 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/mem_cnt_0_s3/CLEAR | sclk:[R] | sclk:[R] | 0.000 | -0.004 | 0.605 |
| 19 | 0.649 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/O_RX_EN_s2/CLEAR | sclk:[R] | sclk:[R] | 0.000 | -0.004 | 0.605 |
| 20 | 0.656 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s0/CLEAR | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.004 | 0.605 |
| 21 | 0.656 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/mem_cnt_7_s1/CLEAR | sclk:[R] | sclk:[R] | 0.000 | 0.000 | 0.608 |
| 22 | 0.656 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/mem_cnt_3_s1/CLEAR | sclk:[R] | sclk:[R] | 0.000 | 0.000 | 0.608 |
| 23 | 0.656 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/mem_cnt_6_s1/CLEAR | sclk:[R] | sclk:[R] | 0.000 | 0.000 | 0.608 |
| 24 | 0.656 | adv7513_rst_inst/rst_1_s0/Q | adv7513_iic_init_inst0/state_2_s0/CLEAR | sclk:[R] | sclk:[R] | 0.000 | 0.000 | 0.608 |
| 25 | 0.661 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0/Q | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s1/PRESET | sdi_phy_rx_clk:[R] | sdi_phy_rx_clk:[R] | 0.000 | 0.004 | 0.610 |
Minimum Pulse Width Table:
| Number | Slack | Actual Width | Required Width | Type | Clock | Objects |
|---|---|---|---|---|---|---|
| 1 | 4.279 | 5.179 | 0.900 | Low Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0 |
| 2 | 4.279 | 5.179 | 0.900 | Low Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2 |
| 3 | 4.279 | 5.179 | 0.900 | Low Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4 |
| 4 | 4.279 | 5.179 | 0.900 | Low Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5 |
| 5 | 4.279 | 5.179 | 0.900 | Low Pulse Width | sdi_phy_rx_clk | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s |
| 6 | 4.282 | 5.182 | 0.900 | High Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0 |
| 7 | 4.282 | 5.182 | 0.900 | High Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2 |
| 8 | 4.282 | 5.182 | 0.900 | High Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4 |
| 9 | 4.282 | 5.182 | 0.900 | High Pulse Width | sdi_phy_rx_clk | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5 |
| 10 | 4.282 | 5.182 | 0.900 | High Pulse Width | sdi_phy_rx_clk | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s |
Timing Report By Analysis Type:
Setup Analysis Report
Report Command:report_timing -setup -max_paths 25 -max_common_paths 1
Path1
Path Summary:
| Slack | 5.319 |
| Data Arrival Time | 9.769 |
| Data Required Time | 15.088 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0 |
| To | vesa_vs_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R52C34[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 1 | R52C34[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0/Q |
| 2.549 | 0.313 | tNET | RR | 1 | R51C32[2][A] | vesa_h_fporch_4_s4/I0 |
| 3.013 | 0.465 | tINS | RR | 4 | R51C32[2][A] | vesa_h_fporch_4_s4/F |
| 3.809 | 0.795 | tNET | RR | 1 | R44C23[1][B] | vesa_h_fporch_5_s2/I1 |
| 4.224 | 0.415 | tINS | RR | 13 | R44C23[1][B] | vesa_h_fporch_5_s2/F |
| 4.714 | 0.490 | tNET | RR | 1 | R41C22[0][A] | vesa_v_sync_2_s2/I1 |
| 5.188 | 0.474 | tINS | RR | 2 | R41C22[0][A] | vesa_v_sync_2_s2/F |
| 5.332 | 0.144 | tNET | RR | 2 | R40C22[2][B] | n2516_s/I0 |
| 5.838 | 0.506 | tINS | RF | 1 | R40C22[2][B] | n2516_s/COUT |
| 5.838 | 0.000 | tNET | FF | 2 | R40C23[0][A] | n2515_s/CIN |
| 5.883 | 0.045 | tINS | FR | 1 | R40C23[0][A] | n2515_s/COUT |
| 5.883 | 0.000 | tNET | RR | 2 | R40C23[0][B] | n2514_s/CIN |
| 5.928 | 0.045 | tINS | RR | 1 | R40C23[0][B] | n2514_s/COUT |
| 5.928 | 0.000 | tNET | RR | 2 | R40C23[1][A] | n2513_s/CIN |
| 5.973 | 0.045 | tINS | RR | 1 | R40C23[1][A] | n2513_s/COUT |
| 5.973 | 0.000 | tNET | RR | 2 | R40C23[1][B] | n2512_s/CIN |
| 6.240 | 0.267 | tINS | RR | 1 | R40C23[1][B] | n2512_s/SUM |
| 6.553 | 0.313 | tNET | RR | 1 | R41C24[3][B] | vesa_vs_s32/I3 |
| 7.000 | 0.448 | tINS | RR | 1 | R41C24[3][B] | vesa_vs_s32/F |
| 7.124 | 0.124 | tNET | RR | 1 | R41C24[2][B] | vesa_vs_s16/I3 |
| 7.589 | 0.465 | tINS | RR | 1 | R41C24[2][B] | vesa_vs_s16/F |
| 7.730 | 0.142 | tNET | RR | 1 | R41C23[2][B] | vesa_vs_s6/I3 |
| 7.967 | 0.236 | tINS | RR | 2 | R41C23[2][B] | vesa_vs_s6/F |
| 8.282 | 0.315 | tNET | RR | 1 | R40C21[3][A] | vesa_vs_s22/I2 |
| 8.543 | 0.261 | tINS | RF | 1 | R40C21[3][A] | vesa_vs_s22/F |
| 8.671 | 0.128 | tNET | FF | 1 | R39C21[1][A] | vesa_vs_s8/I2 |
| 9.086 | 0.415 | tINS | FR | 2 | R39C21[1][A] | vesa_vs_s8/F |
| 9.230 | 0.144 | tNET | RR | 1 | R40C21[2][B] | vesa_vs_s4/I3 |
| 9.645 | 0.415 | tINS | RR | 1 | R40C21[2][B] | vesa_vs_s4/F |
| 9.769 | 0.124 | tNET | RR | 1 | R40C21[0][A] | vesa_vs_s1/CE |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_rx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R40C21[0][A] | vesa_vs_s1/CLK |
| 15.088 | -0.280 | tSu | 1 | R40C21[0][A] | vesa_vs_s1 |
Path Statistics:
| Clock Skew | 0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 4.501, 57.141%; route: 3.032, 38.489%; tC2Q: 0.344, 4.370% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path2
Path Summary:
| Slack | 5.445 |
| Data Arrival Time | 9.866 |
| Data Required Time | 15.311 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0 |
| To | vesa_vs_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R52C34[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 1 | R52C34[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/vres_0_s0/Q |
| 2.549 | 0.313 | tNET | RR | 1 | R51C32[2][A] | vesa_h_fporch_4_s4/I0 |
| 3.013 | 0.465 | tINS | RR | 4 | R51C32[2][A] | vesa_h_fporch_4_s4/F |
| 3.809 | 0.795 | tNET | RR | 1 | R44C23[1][B] | vesa_h_fporch_5_s2/I1 |
| 4.224 | 0.415 | tINS | RR | 13 | R44C23[1][B] | vesa_h_fporch_5_s2/F |
| 4.714 | 0.490 | tNET | RR | 1 | R41C22[0][A] | vesa_v_sync_2_s2/I1 |
| 5.188 | 0.474 | tINS | RR | 2 | R41C22[0][A] | vesa_v_sync_2_s2/F |
| 5.332 | 0.144 | tNET | RR | 2 | R40C22[2][B] | n2516_s/I0 |
| 5.838 | 0.506 | tINS | RF | 1 | R40C22[2][B] | n2516_s/COUT |
| 5.838 | 0.000 | tNET | FF | 2 | R40C23[0][A] | n2515_s/CIN |
| 5.883 | 0.045 | tINS | FR | 1 | R40C23[0][A] | n2515_s/COUT |
| 5.883 | 0.000 | tNET | RR | 2 | R40C23[0][B] | n2514_s/CIN |
| 5.928 | 0.045 | tINS | RR | 1 | R40C23[0][B] | n2514_s/COUT |
| 5.928 | 0.000 | tNET | RR | 2 | R40C23[1][A] | n2513_s/CIN |
| 5.973 | 0.045 | tINS | RR | 1 | R40C23[1][A] | n2513_s/COUT |
| 5.973 | 0.000 | tNET | RR | 2 | R40C23[1][B] | n2512_s/CIN |
| 6.240 | 0.267 | tINS | RR | 1 | R40C23[1][B] | n2512_s/SUM |
| 6.553 | 0.313 | tNET | RR | 1 | R41C24[3][B] | vesa_vs_s32/I3 |
| 7.000 | 0.448 | tINS | RR | 1 | R41C24[3][B] | vesa_vs_s32/F |
| 7.124 | 0.124 | tNET | RR | 1 | R41C24[2][B] | vesa_vs_s16/I3 |
| 7.589 | 0.465 | tINS | RR | 1 | R41C24[2][B] | vesa_vs_s16/F |
| 7.730 | 0.142 | tNET | RR | 1 | R41C23[2][B] | vesa_vs_s6/I3 |
| 7.967 | 0.236 | tINS | RR | 2 | R41C23[2][B] | vesa_vs_s6/F |
| 8.282 | 0.315 | tNET | RR | 1 | R40C21[3][A] | vesa_vs_s22/I2 |
| 8.543 | 0.261 | tINS | RF | 1 | R40C21[3][A] | vesa_vs_s22/F |
| 8.671 | 0.128 | tNET | FF | 1 | R39C21[1][A] | vesa_vs_s8/I2 |
| 9.086 | 0.415 | tINS | FR | 2 | R39C21[1][A] | vesa_vs_s8/F |
| 9.401 | 0.315 | tNET | RR | 1 | R40C21[0][A] | n2399_s3/I0 |
| 9.866 | 0.465 | tINS | RR | 1 | R40C21[0][A] | n2399_s3/F |
| 9.866 | 0.000 | tNET | RR | 1 | R40C21[0][A] | vesa_vs_s1/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_rx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R40C21[0][A] | vesa_vs_s1/CLK |
| 15.311 | -0.057 | tSu | 1 | R40C21[0][A] | vesa_vs_s1 |
Path Statistics:
| Clock Skew | 0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 4.551, 57.068%; route: 3.079, 38.615%; tC2Q: 0.344, 4.317% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path3
Path Summary:
| Slack | 5.606 |
| Data Arrival Time | 9.687 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_2_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.214 | 0.335 | tNET | RR | 1 | R44C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1231_s1/I3 |
| 9.687 | 0.474 | tINS | RR | 1 | R44C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1231_s1/F |
| 9.687 | 0.000 | tNET | RR | 1 | R44C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_2_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R44C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_2_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R44C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_2_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.791, 48.685%; route: 3.665, 47.067%; tC2Q: 0.331, 4.247% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path4
Path Summary:
| Slack | 5.606 |
| Data Arrival Time | 9.687 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_3_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.214 | 0.335 | tNET | RR | 1 | R44C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1230_s0/I3 |
| 9.687 | 0.474 | tINS | RR | 1 | R44C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1230_s0/F |
| 9.687 | 0.000 | tNET | RR | 1 | R44C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_3_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R44C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_3_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R44C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_3_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.791, 48.685%; route: 3.665, 47.067%; tC2Q: 0.331, 4.247% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path5
Path Summary:
| Slack | 5.606 |
| Data Arrival Time | 9.687 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_7_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.214 | 0.335 | tNET | RR | 1 | R43C85[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1226_s0/I2 |
| 9.687 | 0.474 | tINS | RR | 1 | R43C85[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1226_s0/F |
| 9.687 | 0.000 | tNET | RR | 1 | R43C85[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_7_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R43C85[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_7_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R43C85[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_7_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.791, 48.685%; route: 3.665, 47.067%; tC2Q: 0.331, 4.247% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path6
Path Summary:
| Slack | 5.606 |
| Data Arrival Time | 9.687 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_8_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.214 | 0.335 | tNET | RR | 1 | R43C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1225_s1/I3 |
| 9.687 | 0.474 | tINS | RR | 1 | R43C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1225_s1/F |
| 9.687 | 0.000 | tNET | RR | 1 | R43C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_8_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R43C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_8_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R43C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_8_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.791, 48.685%; route: 3.665, 47.067%; tC2Q: 0.331, 4.247% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path7
Path Summary:
| Slack | 5.606 |
| Data Arrival Time | 9.687 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_9_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.214 | 0.335 | tNET | RR | 1 | R43C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1224_s0/I3 |
| 9.687 | 0.474 | tINS | RR | 1 | R43C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1224_s0/F |
| 9.687 | 0.000 | tNET | RR | 1 | R43C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_9_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R43C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_9_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R43C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_9_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.791, 48.685%; route: 3.665, 47.067%; tC2Q: 0.331, 4.247% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path8
Path Summary:
| Slack | 5.606 |
| Data Arrival Time | 9.687 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_10_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.214 | 0.335 | tNET | RR | 1 | R43C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1223_s0/I3 |
| 9.687 | 0.474 | tINS | RR | 1 | R43C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1223_s0/F |
| 9.687 | 0.000 | tNET | RR | 1 | R43C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_10_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R43C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_10_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R43C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_10_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.791, 48.685%; route: 3.665, 47.067%; tC2Q: 0.331, 4.247% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path9
Path Summary:
| Slack | 5.615 |
| Data Arrival Time | 9.678 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_4_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.214 | 0.335 | tNET | RR | 1 | R43C85[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1229_s0/I2 |
| 9.678 | 0.465 | tINS | RR | 1 | R43C85[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1229_s0/F |
| 9.678 | 0.000 | tNET | RR | 1 | R43C85[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_4_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R43C85[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_4_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R43C85[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_4_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.782, 48.626%; route: 3.665, 47.122%; tC2Q: 0.331, 4.252% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path10
Path Summary:
| Slack | 5.800 |
| Data Arrival Time | 9.494 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_11_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.029 | 0.151 | tNET | RR | 1 | R42C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1222_s0/I2 |
| 9.494 | 0.465 | tINS | RR | 1 | R42C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1222_s0/F |
| 9.494 | 0.000 | tNET | RR | 1 | R42C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_11_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R42C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_11_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R42C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_11_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.782, 49.807%; route: 3.481, 45.837%; tC2Q: 0.331, 4.356% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path11
Path Summary:
| Slack | 5.800 |
| Data Arrival Time | 9.494 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_12_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.029 | 0.151 | tNET | RR | 1 | R42C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s0/I2 |
| 9.494 | 0.465 | tINS | RR | 1 | R42C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s0/F |
| 9.494 | 0.000 | tNET | RR | 1 | R42C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_12_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R42C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_12_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R42C85[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_12_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.782, 49.807%; route: 3.481, 45.837%; tC2Q: 0.331, 4.356% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path12
Path Summary:
| Slack | 5.831 |
| Data Arrival Time | 9.471 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_1_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.056 | 0.178 | tNET | RR | 1 | R44C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1232_s0/I2 |
| 9.471 | 0.415 | tINS | RR | 1 | R44C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1232_s0/F |
| 9.471 | 0.000 | tNET | RR | 1 | R44C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_1_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R44C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_1_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R44C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_1_s0 |
Path Statistics:
| Clock Skew | -0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.733, 49.302%; route: 3.508, 46.330%; tC2Q: 0.331, 4.368% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path13
Path Summary:
| Slack | 5.860 |
| Data Arrival Time | 9.442 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_5_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.027 | 0.149 | tNET | RR | 1 | R43C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1228_s0/I3 |
| 9.442 | 0.415 | tINS | RR | 1 | R43C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1228_s0/F |
| 9.442 | 0.000 | tNET | RR | 1 | R43C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_5_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R43C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_5_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R43C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_5_s0 |
Path Statistics:
| Clock Skew | -0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.733, 49.493%; route: 3.478, 46.122%; tC2Q: 0.331, 4.385% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path14
Path Summary:
| Slack | 5.860 |
| Data Arrival Time | 9.442 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_6_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/I2 |
| 8.878 | 0.415 | tINS | RR | 12 | R42C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1221_s2/F |
| 9.027 | 0.149 | tNET | RR | 1 | R43C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1227_s0/I3 |
| 9.442 | 0.415 | tINS | RR | 1 | R43C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1227_s0/F |
| 9.442 | 0.000 | tNET | RR | 1 | R43C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_6_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R43C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_6_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R43C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_6_s0 |
Path Statistics:
| Clock Skew | -0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.733, 49.493%; route: 3.478, 46.122%; tC2Q: 0.331, 4.385% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path15
Path Summary:
| Slack | 6.253 |
| Data Arrival Time | 9.049 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_0_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 7 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q |
| 2.429 | 0.193 | tNET | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/I0 |
| 2.845 | 0.415 | tINS | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/F |
| 3.157 | 0.313 | tNET | RR | 2 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/I0 |
| 3.658 | 0.501 | tINS | RF | 1 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/COUT |
| 3.658 | 0.000 | tNET | FF | 2 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/CIN |
| 3.703 | 0.045 | tINS | FR | 1 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/COUT |
| 3.703 | 0.000 | tNET | RR | 2 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/CIN |
| 3.748 | 0.045 | tINS | RR | 1 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/COUT |
| 4.109 | 0.361 | tNET | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/I3 |
| 4.345 | 0.236 | tINS | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/F |
| 4.658 | 0.313 | tNET | RR | 2 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/I0 |
| 5.159 | 0.501 | tINS | RF | 1 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/COUT |
| 5.159 | 0.000 | tNET | FF | 2 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/CIN |
| 5.204 | 0.045 | tINS | FR | 1 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/COUT |
| 5.204 | 0.000 | tNET | RR | 2 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/CIN |
| 5.249 | 0.045 | tINS | RR | 1 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/COUT |
| 5.249 | 0.000 | tNET | RR | 2 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/CIN |
| 5.294 | 0.045 | tINS | RR | 3 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/COUT |
| 5.659 | 0.366 | tNET | RR | 1 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/I1 |
| 6.033 | 0.373 | tINS | RR | 3 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/F |
| 6.179 | 0.146 | tNET | RR | 1 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/I0 |
| 6.644 | 0.465 | tINS | RR | 5 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/F |
| 6.790 | 0.146 | tNET | RR | 1 | R41C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1211_s4/I1 |
| 7.163 | 0.373 | tINS | RR | 3 | R41C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1211_s4/F |
| 7.463 | 0.299 | tNET | RR | 1 | R39C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1212_s6/I2 |
| 7.936 | 0.474 | tINS | RR | 1 | R39C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1212_s6/F |
| 8.060 | 0.124 | tNET | RR | 1 | R39C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1212_s3/I2 |
| 8.534 | 0.474 | tINS | RR | 1 | R39C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1212_s3/F |
| 8.675 | 0.142 | tNET | RR | 1 | R40C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1212_s1/I3 |
| 9.049 | 0.373 | tINS | RR | 1 | R40C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1212_s1/F |
| 9.049 | 0.000 | tNET | RR | 1 | R40C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_0_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R40C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_0_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R40C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_0_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Setup Relationship | 13.468 |
| Logic Level | 13 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 4.410, 61.616%; route: 2.403, 33.574%; tC2Q: 0.344, 4.810% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path16
Path Summary:
| Slack | 6.264 |
| Data Arrival Time | 9.047 |
| Data Required Time | 15.311 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_6_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 7 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q |
| 2.429 | 0.193 | tNET | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/I0 |
| 2.845 | 0.415 | tINS | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/F |
| 3.157 | 0.313 | tNET | RR | 2 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/I0 |
| 3.658 | 0.501 | tINS | RF | 1 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/COUT |
| 3.658 | 0.000 | tNET | FF | 2 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/CIN |
| 3.703 | 0.045 | tINS | FR | 1 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/COUT |
| 3.703 | 0.000 | tNET | RR | 2 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/CIN |
| 3.748 | 0.045 | tINS | RR | 1 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/COUT |
| 4.109 | 0.361 | tNET | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/I3 |
| 4.345 | 0.236 | tINS | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/F |
| 4.658 | 0.313 | tNET | RR | 2 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/I0 |
| 5.159 | 0.501 | tINS | RF | 1 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/COUT |
| 5.159 | 0.000 | tNET | FF | 2 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/CIN |
| 5.204 | 0.045 | tINS | FR | 1 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/COUT |
| 5.204 | 0.000 | tNET | RR | 2 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/CIN |
| 5.249 | 0.045 | tINS | RR | 1 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/COUT |
| 5.249 | 0.000 | tNET | RR | 2 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/CIN |
| 5.294 | 0.045 | tINS | RR | 3 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/COUT |
| 5.659 | 0.366 | tNET | RR | 1 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/I1 |
| 6.033 | 0.373 | tINS | RR | 3 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/F |
| 6.179 | 0.146 | tNET | RR | 1 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/I0 |
| 6.644 | 0.465 | tINS | RR | 5 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/F |
| 6.963 | 0.319 | tNET | RR | 1 | R40C83[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s4/I2 |
| 7.337 | 0.373 | tINS | RR | 3 | R40C83[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s4/F |
| 7.343 | 0.007 | tNET | RR | 1 | R40C83[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s1/I2 |
| 7.791 | 0.448 | tINS | RR | 1 | R40C83[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s1/F |
| 7.933 | 0.142 | tNET | RR | 1 | R41C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s0/I0 |
| 8.407 | 0.474 | tINS | RR | 2 | R41C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s0/F |
| 8.582 | 0.175 | tNET | RR | 1 | R39C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1214_s0/I0 |
| 9.047 | 0.465 | tINS | RR | 1 | R39C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1214_s0/F |
| 9.047 | 0.000 | tNET | RR | 1 | R39C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_6_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R39C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_6_s0/CLK |
| 15.311 | -0.057 | tSu | 1 | R39C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_6_s0 |
Path Statistics:
| Clock Skew | 0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 13 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 4.475, 62.547%; route: 2.336, 32.642%; tC2Q: 0.344, 4.811% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path17
Path Summary:
| Slack | 6.410 |
| Data Arrival Time | 8.900 |
| Data Required Time | 15.311 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_76_s1 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_9_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R34C78[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_76_s1/CLK |
| 2.236 | 0.344 | tC2Q | RR | 6 | R34C78[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_76_s1/Q |
| 3.531 | 1.295 | tNET | RR | 1 | R32C77[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw15_parity_s1/I0 |
| 3.904 | 0.373 | tINS | RR | 2 | R32C77[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw15_parity_s1/F |
| 4.201 | 0.297 | tNET | RR | 1 | R30C77[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw17_parity_s1/I2 |
| 4.649 | 0.448 | tINS | RR | 3 | R30C77[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw17_parity_s1/F |
| 5.314 | 0.665 | tNET | RR | 1 | R30C78[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw17_parity_s0/I1 |
| 5.729 | 0.415 | tINS | RR | 4 | R30C78[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw17_parity_s0/F |
| 6.121 | 0.391 | tNET | RR | 1 | R27C79[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1195_s131/I1 |
| 6.594 | 0.474 | tINS | RR | 1 | R27C79[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1195_s131/F |
| 6.596 | 0.002 | tNET | RR | 1 | R27C79[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1212_s17/I1 |
| 7.012 | 0.415 | tINS | RR | 1 | R27C79[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1212_s17/F |
| 7.519 | 0.507 | tNET | RR | 1 | R30C80[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1212_s4/I2 |
| 7.993 | 0.474 | tINS | RR | 1 | R30C80[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1212_s4/F |
| 8.427 | 0.434 | tNET | RR | 1 | R30C79[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1212_s0/I3 |
| 8.900 | 0.474 | tINS | RR | 1 | R30C79[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1212_s0/F |
| 8.900 | 0.000 | tNET | RR | 1 | R30C79[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_9_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R30C79[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_9_s0/CLK |
| 15.311 | -0.057 | tSu | 1 | R30C79[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_9_s0 |
Path Statistics:
| Clock Skew | 0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 8 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 3.072, 43.836%; route: 3.592, 51.252%; tC2Q: 0.344, 4.912% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path18
Path Summary:
| Slack | 6.424 |
| Data Arrival Time | 8.878 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.463 | 0.349 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1233_s1/I3 |
| 8.878 | 0.415 | tINS | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1233_s1/F |
| 8.878 | 0.000 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
Path Statistics:
| Clock Skew | -0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 11 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.318, 47.542%; route: 3.330, 47.719%; tC2Q: 0.331, 4.740% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path19
Path Summary:
| Slack | 6.524 |
| Data Arrival Time | 8.787 |
| Data Required Time | 15.311 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_5_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 7 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q |
| 2.429 | 0.193 | tNET | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/I0 |
| 2.845 | 0.415 | tINS | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/F |
| 3.157 | 0.313 | tNET | RR | 2 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/I0 |
| 3.658 | 0.501 | tINS | RF | 1 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/COUT |
| 3.658 | 0.000 | tNET | FF | 2 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/CIN |
| 3.703 | 0.045 | tINS | FR | 1 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/COUT |
| 3.703 | 0.000 | tNET | RR | 2 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/CIN |
| 3.748 | 0.045 | tINS | RR | 1 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/COUT |
| 4.109 | 0.361 | tNET | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/I3 |
| 4.345 | 0.236 | tINS | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/F |
| 4.658 | 0.313 | tNET | RR | 2 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/I0 |
| 5.159 | 0.501 | tINS | RF | 1 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/COUT |
| 5.159 | 0.000 | tNET | FF | 2 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/CIN |
| 5.204 | 0.045 | tINS | FR | 1 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/COUT |
| 5.204 | 0.000 | tNET | RR | 2 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/CIN |
| 5.249 | 0.045 | tINS | RR | 1 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/COUT |
| 5.249 | 0.000 | tNET | RR | 2 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/CIN |
| 5.294 | 0.045 | tINS | RR | 3 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/COUT |
| 5.659 | 0.366 | tNET | RR | 1 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/I1 |
| 6.033 | 0.373 | tINS | RR | 3 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/F |
| 6.179 | 0.146 | tNET | RR | 1 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/I0 |
| 6.644 | 0.465 | tINS | RR | 5 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/F |
| 6.963 | 0.319 | tNET | RR | 1 | R40C83[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s4/I2 |
| 7.337 | 0.373 | tINS | RR | 3 | R40C83[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s4/F |
| 7.343 | 0.007 | tNET | RR | 1 | R40C83[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s1/I2 |
| 7.791 | 0.448 | tINS | RR | 1 | R40C83[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s1/F |
| 7.933 | 0.142 | tNET | RR | 1 | R41C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s0/I0 |
| 8.407 | 0.474 | tINS | RR | 2 | R41C83[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1215_s0/F |
| 8.787 | 0.380 | tNET | RR | 1 | R40C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_5_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R40C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_5_s0/CLK |
| 15.311 | -0.057 | tSu | 1 | R40C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_5_s0 |
Path Statistics:
| Clock Skew | 0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 4.011, 58.166%; route: 2.540, 36.841%; tC2Q: 0.344, 4.993% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path20
Path Summary:
| Slack | 6.588 |
| Data Arrival Time | 8.715 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_3_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 7 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q |
| 2.429 | 0.193 | tNET | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/I0 |
| 2.845 | 0.415 | tINS | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/F |
| 3.157 | 0.313 | tNET | RR | 2 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/I0 |
| 3.658 | 0.501 | tINS | RF | 1 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/COUT |
| 3.658 | 0.000 | tNET | FF | 2 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/CIN |
| 3.703 | 0.045 | tINS | FR | 1 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/COUT |
| 3.703 | 0.000 | tNET | RR | 2 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/CIN |
| 3.748 | 0.045 | tINS | RR | 1 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/COUT |
| 4.109 | 0.361 | tNET | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/I3 |
| 4.345 | 0.236 | tINS | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/F |
| 4.658 | 0.313 | tNET | RR | 2 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/I0 |
| 5.159 | 0.501 | tINS | RF | 1 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/COUT |
| 5.159 | 0.000 | tNET | FF | 2 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/CIN |
| 5.204 | 0.045 | tINS | FR | 1 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/COUT |
| 5.204 | 0.000 | tNET | RR | 2 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/CIN |
| 5.249 | 0.045 | tINS | RR | 1 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/COUT |
| 5.249 | 0.000 | tNET | RR | 2 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/CIN |
| 5.294 | 0.045 | tINS | RR | 3 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/COUT |
| 5.659 | 0.366 | tNET | RR | 1 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/I1 |
| 6.033 | 0.373 | tINS | RR | 3 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/F |
| 6.179 | 0.146 | tNET | RR | 1 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/I0 |
| 6.644 | 0.465 | tINS | RR | 5 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/F |
| 6.790 | 0.146 | tNET | RR | 1 | R41C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s3/I1 |
| 7.205 | 0.415 | tINS | RR | 1 | R41C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s3/F |
| 7.207 | 0.002 | tNET | RR | 1 | R41C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s7/I1 |
| 7.681 | 0.474 | tINS | RR | 1 | R41C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s7/F |
| 7.976 | 0.295 | tNET | RR | 1 | R41C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s2/I3 |
| 8.237 | 0.261 | tINS | RF | 1 | R41C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s2/F |
| 8.241 | 0.005 | tNET | FF | 1 | R41C86[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s0/I2 |
| 8.715 | 0.474 | tINS | FR | 1 | R41C86[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1217_s0/F |
| 8.715 | 0.000 | tNET | RR | 1 | R41C86[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_3_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R41C86[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_3_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R41C86[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_3_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Setup Relationship | 13.468 |
| Logic Level | 13 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 4.339, 63.594%; route: 2.140, 31.360%; tC2Q: 0.344, 5.045% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path21
Path Summary:
| Slack | 6.604 |
| Data Arrival Time | 8.551 |
| Data Required Time | 15.155 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_en_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.195 | 0.319 | tNET | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/I2 |
| 7.665 | 0.469 | tINS | RR | 1 | R40C86[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s3/F |
| 7.667 | 0.002 | tNET | RR | 1 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/I3 |
| 8.115 | 0.448 | tINS | RR | 3 | R40C86[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s0/F |
| 8.551 | 0.436 | tNET | RR | 1 | R41C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_en_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R41C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_en_s0/CLK |
| 15.155 | -0.205 | tSu | 1 | R41C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_en_s0 |
Path Statistics:
| Clock Skew | -0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 10 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 2.902, 43.640%; route: 3.418, 51.387%; tC2Q: 0.331, 4.973% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path22
Path Summary:
| Slack | 6.637 |
| Data Arrival Time | 8.665 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_1_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 7 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q |
| 2.567 | 0.331 | tNET | RR | 1 | R44C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1230_s1/I0 |
| 2.940 | 0.373 | tINS | RR | 2 | R44C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1230_s1/F |
| 2.945 | 0.005 | tNET | RR | 1 | R44C85[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s46/I2 |
| 3.418 | 0.474 | tINS | RR | 1 | R44C85[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s46/F |
| 3.421 | 0.002 | tNET | RR | 1 | R44C85[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s45/I2 |
| 3.794 | 0.373 | tINS | RR | 1 | R44C85[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s45/F |
| 4.089 | 0.295 | tNET | RR | 2 | R44C86[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s29/I0 |
| 4.589 | 0.501 | tINS | RF | 1 | R44C86[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s29/COUT |
| 4.589 | 0.000 | tNET | FF | 2 | R44C86[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s30/CIN |
| 4.634 | 0.045 | tINS | FR | 1 | R44C86[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s30/COUT |
| 4.634 | 0.000 | tNET | RR | 2 | R44C86[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s31/CIN |
| 4.679 | 0.045 | tINS | RF | 5 | R44C86[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n746_s31/COUT |
| 5.254 | 0.575 | tNET | FF | 1 | R40C86[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1208_s4/I1 |
| 5.719 | 0.465 | tINS | FR | 6 | R40C86[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1208_s4/F |
| 6.287 | 0.568 | tNET | RR | 1 | R37C85[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1208_s8/I3 |
| 6.752 | 0.465 | tINS | RR | 2 | R37C85[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1208_s8/F |
| 6.878 | 0.126 | tNET | RR | 1 | R37C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1208_s3/I1 |
| 7.293 | 0.415 | tINS | RR | 6 | R37C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1208_s3/F |
| 7.612 | 0.319 | tNET | RR | 1 | R36C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1211_s3/I3 |
| 8.077 | 0.465 | tINS | RR | 1 | R36C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1211_s3/F |
| 8.201 | 0.124 | tNET | RR | 1 | R36C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1211_s1/I3 |
| 8.665 | 0.465 | tINS | RR | 1 | R36C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1211_s1/F |
| 8.665 | 0.000 | tNET | RR | 1 | R36C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_1_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R36C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_1_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R36C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_time_1_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Setup Relationship | 13.468 |
| Logic Level | 11 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 4.085, 60.306%; route: 2.344, 34.612%; tC2Q: 0.344, 5.082% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path23
Path Summary:
| Slack | 6.742 |
| Data Arrival Time | 8.560 |
| Data Required Time | 15.302 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_1_s1 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_8_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R33C75[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_1_s1/CLK |
| 2.244 | 0.344 | tC2Q | RR | 3 | R33C75[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_data_store_inst/aduio_data_lock_1_s1/Q |
| 3.043 | 0.799 | tNET | RR | 1 | R32C76[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw2_parity_s1/I1 |
| 3.508 | 0.465 | tINS | RR | 3 | R32C76[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw2_parity_s1/F |
| 4.318 | 0.810 | tNET | RR | 1 | R26C79[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw2_parity_s5/I0 |
| 4.733 | 0.415 | tINS | RR | 3 | R26C79[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/udw2_parity_s5/F |
| 5.050 | 0.317 | tNET | RR | 1 | R27C79[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1195_s136/I0 |
| 5.515 | 0.465 | tINS | RR | 2 | R27C79[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1195_s136/F |
| 6.021 | 0.506 | tNET | RR | 1 | R31C80[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1196_s103/I3 |
| 6.490 | 0.469 | tINS | RR | 1 | R31C80[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1196_s103/F |
| 6.490 | 0.000 | tNET | RR | 1 | R31C80[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1196_s97/I0 |
| 6.613 | 0.123 | tINS | RR | 1 | R31C80[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1196_s97/O |
| 6.754 | 0.142 | tNET | RR | 1 | R30C80[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1213_s16/I1 |
| 7.228 | 0.474 | tINS | RR | 1 | R30C80[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1213_s16/F |
| 7.767 | 0.539 | tNET | RR | 1 | R27C78[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1213_s4/I3 |
| 8.182 | 0.415 | tINS | RR | 1 | R27C78[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1213_s4/F |
| 8.324 | 0.142 | tNET | RR | 1 | R27C78[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1213_s0/I3 |
| 8.560 | 0.236 | tINS | RR | 1 | R27C78[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/n1213_s0/F |
| 8.560 | 0.000 | tNET | RR | 1 | R27C78[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_8_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R27C78[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_8_s0/CLK |
| 15.302 | -0.057 | tSu | 1 | R27C78[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_hd_audio_wrapper_inst/tx_hd_audio_data_embad_inst/pack_data_8_s0 |
Path Statistics:
| Clock Skew | -0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 8 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 3.061, 45.963%; route: 3.255, 48.868%; tC2Q: 0.344, 5.169% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path24
Path Summary:
| Slack | 6.773 |
| Data Arrival Time | 8.538 |
| Data Required Time | 15.311 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_4_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.892 | 1.892 | tNET | RR | 1 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/CLK |
| 2.236 | 0.344 | tC2Q | RR | 7 | R42C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_0_s0/Q |
| 2.429 | 0.193 | tNET | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/I0 |
| 2.845 | 0.415 | tINS | RR | 1 | R44C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s45/F |
| 3.157 | 0.313 | tNET | RR | 2 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/I0 |
| 3.658 | 0.501 | tINS | RF | 1 | R44C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s26/COUT |
| 3.658 | 0.000 | tNET | FF | 2 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/CIN |
| 3.703 | 0.045 | tINS | FR | 1 | R44C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s27/COUT |
| 3.703 | 0.000 | tNET | RR | 2 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/CIN |
| 3.748 | 0.045 | tINS | RR | 1 | R44C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s28/COUT |
| 4.109 | 0.361 | tNET | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/I3 |
| 4.345 | 0.236 | tINS | RR | 1 | R43C84[2][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s44/F |
| 4.658 | 0.313 | tNET | RR | 2 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/I0 |
| 5.159 | 0.501 | tINS | RF | 1 | R40C84[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s29/COUT |
| 5.159 | 0.000 | tNET | FF | 2 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/CIN |
| 5.204 | 0.045 | tINS | FR | 1 | R40C84[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s30/COUT |
| 5.204 | 0.000 | tNET | RR | 2 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/CIN |
| 5.249 | 0.045 | tINS | RR | 1 | R40C84[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s31/COUT |
| 5.249 | 0.000 | tNET | RR | 2 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/CIN |
| 5.294 | 0.045 | tINS | RR | 3 | R40C84[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n364_s32/COUT |
| 5.659 | 0.366 | tNET | RR | 1 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/I1 |
| 6.033 | 0.373 | tINS | RR | 3 | R40C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s6/F |
| 6.179 | 0.146 | tNET | RR | 1 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/I0 |
| 6.644 | 0.465 | tINS | RR | 5 | R41C85[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1213_s10/F |
| 6.963 | 0.319 | tNET | RR | 1 | R40C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1216_s7/I1 |
| 7.378 | 0.415 | tINS | RR | 1 | R40C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1216_s7/F |
| 7.673 | 0.295 | tNET | RR | 1 | R39C83[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1216_s2/I2 |
| 8.121 | 0.448 | tINS | RR | 1 | R39C83[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1216_s2/F |
| 8.123 | 0.002 | tNET | RR | 1 | R39C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1216_s0/I2 |
| 8.538 | 0.415 | tINS | RR | 1 | R39C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1216_s0/F |
| 8.538 | 0.000 | tNET | RR | 1 | R39C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_4_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R39C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_4_s0/CLK |
| 15.311 | -0.057 | tSu | 1 | R39C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_4_s0 |
Path Statistics:
| Clock Skew | 0.008 |
| Setup Relationship | 13.468 |
| Logic Level | 12 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
| Arrival Data Path Delay | cell: 3.994, 60.088%; route: 2.309, 34.733%; tC2Q: 0.344, 5.179% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path25
Path Summary:
| Slack | 6.826 |
| Data Arrival Time | 8.468 |
| Data Required Time | 15.294 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_0_s0 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 1.900 | 1.900 | tNET | RR | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/CLK |
| 2.231 | 0.331 | tC2Q | RF | 1 | R42C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/cnt_slow_0_s0/Q |
| 3.052 | 0.821 | tNET | FF | 2 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/CIN |
| 3.097 | 0.045 | tINS | FR | 1 | R43C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s26/COUT |
| 3.097 | 0.000 | tNET | RR | 2 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/CIN |
| 3.142 | 0.045 | tINS | RR | 1 | R43C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s27/COUT |
| 3.142 | 0.000 | tNET | RR | 2 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/CIN |
| 3.187 | 0.045 | tINS | RR | 1 | R43C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s28/COUT |
| 3.187 | 0.000 | tNET | RR | 2 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/CIN |
| 3.232 | 0.045 | tINS | RR | 1 | R43C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s29/COUT |
| 3.232 | 0.000 | tNET | RR | 2 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/CIN |
| 3.277 | 0.045 | tINS | RR | 1 | R43C83[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s30/COUT |
| 3.638 | 0.361 | tNET | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/I3 |
| 4.103 | 0.465 | tINS | RR | 1 | R43C84[2][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s43/F |
| 4.658 | 0.555 | tNET | RR | 2 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/I0 |
| 5.158 | 0.501 | tINS | RF | 1 | R37C83[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s31/COUT |
| 5.158 | 0.000 | tNET | FF | 2 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/CIN |
| 5.203 | 0.045 | tINS | FR | 1 | R37C83[0][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s32/COUT |
| 5.203 | 0.000 | tNET | RR | 2 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/CIN |
| 5.248 | 0.045 | tINS | RR | 1 | R37C83[1][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n184_s33/COUT |
| 5.853 | 0.605 | tNET | RR | 1 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/I2 |
| 6.090 | 0.236 | tINS | RR | 4 | R40C83[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1234_s9/F |
| 6.407 | 0.317 | tNET | RR | 1 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/I0 |
| 6.876 | 0.469 | tINS | RR | 4 | R41C85[3][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s3/F |
| 7.317 | 0.441 | tNET | RR | 1 | R39C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s1/I3 |
| 7.690 | 0.373 | tINS | RR | 1 | R39C84[3][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s1/F |
| 8.003 | 0.313 | tNET | RR | 1 | R39C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s0/I0 |
| 8.468 | 0.465 | tINS | RR | 1 | R39C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/n1220_s0/F |
| 8.468 | 0.000 | tNET | RR | 1 | R39C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_0_s0/D |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R39C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_0_s0/CLK |
| 15.294 | -0.057 | tSu | 1 | R39C85[0][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_audio_data_wrapper_inst/tx_audio_gen_de_inst/rd_cnt_poit_0_s0 |
Path Statistics:
| Clock Skew | -0.017 |
| Setup Relationship | 13.468 |
| Logic Level | 10 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
| Arrival Data Path Delay | cell: 2.824, 42.994%; route: 3.413, 51.970%; tC2Q: 0.331, 5.036% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Hold Analysis Report
Report Command:report_timing -hold -max_paths 25 -max_common_paths 1
Path1
Path Summary:
| Slack | 0.040 |
| Data Arrival Time | 0.859 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_42_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R39C51[2][A] | sdi_audio_buffer_pro_rx_inst/wr_data_42_s1/CLK |
| 0.734 | 0.130 | tC2Q | RR | 1 | R39C51[2][A] | sdi_audio_buffer_pro_rx_inst/wr_data_42_s1/Q |
| 0.859 | 0.124 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[10] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.181 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path2
Path Summary:
| Slack | 0.040 |
| Data Arrival Time | 0.859 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_41_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R39C51[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_41_s1/CLK |
| 0.734 | 0.130 | tC2Q | RR | 1 | R39C51[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_41_s1/Q |
| 0.859 | 0.124 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[9] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.181 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path3
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.859 |
| Data Required Time | 0.815 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_24_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R39C47[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_24_s1/CLK |
| 0.734 | 0.130 | tC2Q | RR | 1 | R39C47[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_24_s1/Q |
| 0.859 | 0.124 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[8] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Path4
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_36_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C50[3][A] | sdi_audio_buffer_pro_rx_inst/wr_data_36_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R39C50[3][A] | sdi_audio_buffer_pro_rx_inst/wr_data_36_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[4] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path5
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_35_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C50[2][A] | sdi_audio_buffer_pro_rx_inst/wr_data_35_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R39C50[2][A] | sdi_audio_buffer_pro_rx_inst/wr_data_35_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[3] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path6
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_34_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C50[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_34_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R39C50[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_34_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[2] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path7
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_33_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R40C50[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_33_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R40C50[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_33_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[1] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[10][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path8
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_8_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R40C44[2][B] | sdi_audio_buffer_pro_rx_inst/wr_data_8_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R40C44[2][B] | sdi_audio_buffer_pro_rx_inst/wr_data_8_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[8] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path9
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_5_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R40C44[3][A] | sdi_audio_buffer_pro_rx_inst/wr_data_5_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R40C44[3][A] | sdi_audio_buffer_pro_rx_inst/wr_data_5_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[5] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path10
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.859 |
| Data Required Time | 0.815 |
| From | sdi_audio_buffer_pro_tx_inst/wr_data_37_s1 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R39C71[0][A] | sdi_audio_buffer_pro_tx_inst/wr_data_37_s1/CLK |
| 0.734 | 0.130 | tC2Q | RR | 1 | R39C71[0][A] | sdi_audio_buffer_pro_tx_inst/wr_data_37_s1/Q |
| 0.859 | 0.124 | tNET | RR | 1 | BSRAM_R38[14][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[5] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[14][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[14][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Path11
Path Summary:
| Slack | 0.043 |
| Data Arrival Time | 0.859 |
| Data Required Time | 0.815 |
| From | sdi_audio_buffer_pro_tx_inst/wr_data_35_s1 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R39C71[2][A] | sdi_audio_buffer_pro_tx_inst/wr_data_35_s1/CLK |
| 0.734 | 0.130 | tC2Q | RR | 1 | R39C71[2][A] | sdi_audio_buffer_pro_tx_inst/wr_data_35_s1/Q |
| 0.859 | 0.124 | tNET | RR | 1 | BSRAM_R38[14][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/DI[3] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[14][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[14][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_1_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Path12
Path Summary:
| Slack | 0.046 |
| Data Arrival Time | 0.865 |
| Data Required Time | 0.819 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_1_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C26[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_1_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 3 | R39C26[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_1_s0/Q |
| 0.865 | 0.127 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[2] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.127, 49.474%; tC2Q: 0.130, 50.526% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path13
Path Summary:
| Slack | 0.047 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.815 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_31_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R40C48[1][B] | sdi_audio_buffer_pro_rx_inst/wr_data_31_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R40C48[1][B] | sdi_audio_buffer_pro_rx_inst/wr_data_31_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[15] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Path14
Path Summary:
| Slack | 0.047 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.815 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_28_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C48[2][A] | sdi_audio_buffer_pro_rx_inst/wr_data_28_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R39C48[2][A] | sdi_audio_buffer_pro_rx_inst/wr_data_28_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[12] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Path15
Path Summary:
| Slack | 0.047 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.815 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_27_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C48[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_27_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R39C48[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_27_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[11] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Path16
Path Summary:
| Slack | 0.047 |
| Data Arrival Time | 0.862 |
| Data Required Time | 0.815 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_26_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C48[0][A] | sdi_audio_buffer_pro_rx_inst/wr_data_26_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R39C48[0][A] | sdi_audio_buffer_pro_rx_inst/wr_data_26_s1/Q |
| 0.862 | 0.124 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/DI[10] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[9] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Path17
Path Summary:
| Slack | 0.047 |
| Data Arrival Time | 0.866 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_10_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R40C45[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_10_s1/CLK |
| 0.742 | 0.130 | tC2Q | RR | 1 | R40C45[1][A] | sdi_audio_buffer_pro_rx_inst/wr_data_10_s1/Q |
| 0.866 | 0.124 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[10] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.124, 48.936%; tC2Q: 0.130, 51.064% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path18
Path Summary:
| Slack | 0.047 |
| Data Arrival Time | 0.866 |
| Data Required Time | 0.819 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_5_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C26[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_5_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 3 | R39C26[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_5_s0/Q |
| 0.866 | 0.128 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[6] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.128, 49.650%; tC2Q: 0.130, 50.350% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path19
Path Summary:
| Slack | 0.047 |
| Data Arrival Time | 0.866 |
| Data Required Time | 0.819 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_4_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C26[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_4_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 3 | R39C26[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_4_s0/Q |
| 0.866 | 0.128 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[5] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.128, 49.650%; tC2Q: 0.130, 50.350% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path20
Path Summary:
| Slack | 0.048 |
| Data Arrival Time | 0.867 |
| Data Required Time | 0.819 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_7_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R39C26[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_7_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 3 | R39C26[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/datas2_d2_7_s0/Q |
| 0.867 | 0.129 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/DI[8] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[4][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_3 |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.129, 49.826%; tC2Q: 0.130, 50.174% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path21
Path Summary:
| Slack | 0.061 |
| Data Arrival Time | 4.772 |
| Data Required Time | 4.711 |
| From | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_5_s0 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
| Launch Clk | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk:[R] |
| Latch Clk | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk | ||||
| 3.896 | 3.896 | tCL | RR | 155 | TOPSIDE[0] | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT |
| 4.506 | 0.609 | tNET | RR | 1 | R39C44[0][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_5_s0/CLK |
| 4.635 | 0.130 | tC2Q | RR | 8 | R39C44[0][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_5_s0/Q |
| 4.772 | 0.137 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/ADB[10] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT.default_gen_clk | ||||
| 3.896 | 3.896 | tCL | RR | 155 | TOPSIDE[0] | i2s_clkdiv4_inst0/clkdiv_inst/CLKOUT |
| 4.679 | 0.783 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/CLKB |
| 4.711 | 0.032 | tHld | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.609, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.137, 51.351%; tC2Q: 0.130, 48.649% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
Path22
Path Summary:
| Slack | 0.080 |
| Data Arrival Time | 0.899 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_0_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R48C44[0][A] | sdi_audio_buffer_pro_rx_inst/wr_data_0_s1/CLK |
| 0.738 | 0.130 | tC2Q | RR | 1 | R48C44[0][A] | sdi_audio_buffer_pro_rx_inst/wr_data_0_s1/Q |
| 0.899 | 0.161 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[0] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.177 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.161, 55.418%; tC2Q: 0.130, 44.582% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path23
Path Summary:
| Slack | 0.084 |
| Data Arrival Time | 0.903 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_14_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R48C45[1][B] | sdi_audio_buffer_pro_rx_inst/wr_data_14_s1/CLK |
| 0.742 | 0.130 | tC2Q | RR | 1 | R48C45[1][B] | sdi_audio_buffer_pro_rx_inst/wr_data_14_s1/Q |
| 0.903 | 0.161 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[14] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.161, 55.418%; tC2Q: 0.130, 44.582% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path24
Path Summary:
| Slack | 0.084 |
| Data Arrival Time | 0.903 |
| Data Required Time | 0.819 |
| From | sdi_audio_buffer_pro_rx_inst/wr_data_13_s1 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R48C45[0][B] | sdi_audio_buffer_pro_rx_inst/wr_data_13_s1/CLK |
| 0.742 | 0.130 | tC2Q | RR | 1 | R48C45[0][B] | sdi_audio_buffer_pro_rx_inst/wr_data_13_s1/Q |
| 0.903 | 0.161 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/DI[13] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.786 | 0.786 | tNET | RR | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s/CLKA |
| 0.819 | 0.033 | tHld | 1 | BSRAM_R38[8][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_0_s |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.161, 55.418%; tC2Q: 0.130, 44.582% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.786, 100.000% |
Path25
Path Summary:
| Slack | 0.105 |
| Data Arrival Time | 0.921 |
| Data Required Time | 0.815 |
| From | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/datas2_d1_3_s0 |
| To | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/tx_hd_lbdl_sdpb_inst1/sdpx9b_inst_5 |
| Launch Clk | sdi_phy_tx_clk:[R] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R50C76[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/datas2_d1_3_s0/CLK |
| 0.735 | 0.127 | tC2Q | RF | 6 | R50C76[1][B] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/datas2_d1_3_s0/Q |
| 0.921 | 0.185 | tNET | FF | 1 | BSRAM_R38[14][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/tx_hd_lbdl_sdpb_inst1/sdpx9b_inst_5/DI[4] |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_tx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 0.782 | 0.782 | tNET | RR | 1 | BSRAM_R38[14][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/tx_hd_lbdl_sdpb_inst1/sdpx9b_inst_5/CLKA |
| 0.815 | 0.033 | tHld | 1 | BSRAM_R38[14][A] | SDI_Encoder_Top_inst/sdi_encoder_wrapper_inst/tx_hd_video_wrapper_inst/tx_hd_level_datastream_inst/tx_hd_level_b_dl_sdpb_pro_inst/tx_hd_lbdl_sdpb_inst1/sdpx9b_inst_5 |
Path Statistics:
| Clock Skew | 0.174 |
| Hold Relationship | 0.000 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 0.185, 59.366%; tC2Q: 0.127, 40.634% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.782, 100.000% |
Recovery Analysis Report
Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1
Path1
Path Summary:
| Slack | 1.024 |
| Data Arrival Time | 7.346 |
| Data Required Time | 8.370 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[F] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | 1 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/CLK |
| 2.690 | 0.344 | tC2Q | RR | 3 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q |
| 3.039 | 0.349 | tNET | RR | 1 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/I1 |
| 3.381 | 0.342 | tINS | RF | 486 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/F |
| 7.346 | 3.966 | tNET | FF | 1 | R66C73[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R66C73[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0/CLK |
| 8.370 | -0.263 | tSu | 1 | R66C73[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0 |
Path Statistics:
| Clock Skew | -0.447 |
| Setup Relationship | 6.734 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 2.346, 100.000% |
| Arrival Data Path Delay | cell: 0.342, 6.839%; route: 4.314, 86.277%; tC2Q: 0.344, 6.884% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
Path2
Path Summary:
| Slack | 1.024 |
| Data Arrival Time | 7.346 |
| Data Required Time | 8.370 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[F] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | 1 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/CLK |
| 2.690 | 0.344 | tC2Q | RR | 3 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q |
| 3.039 | 0.349 | tNET | RR | 1 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/I1 |
| 3.381 | 0.342 | tINS | RF | 486 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/F |
| 7.346 | 3.966 | tNET | FF | 1 | R68C73[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R68C73[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0/CLK |
| 8.370 | -0.263 | tSu | 1 | R68C73[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0 |
Path Statistics:
| Clock Skew | -0.447 |
| Setup Relationship | 6.734 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 2.346, 100.000% |
| Arrival Data Path Delay | cell: 0.342, 6.839%; route: 4.314, 86.277%; tC2Q: 0.344, 6.884% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
Path3
Path Summary:
| Slack | 1.416 |
| Data Arrival Time | 7.383 |
| Data Required Time | 8.798 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[F] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | 1 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/CLK |
| 2.690 | 0.344 | tC2Q | RR | 3 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q |
| 3.039 | 0.349 | tNET | RR | 1 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/I1 |
| 3.381 | 0.342 | tINS | RF | 486 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/F |
| 7.383 | 4.002 | tNET | FF | 1 | R35C43[0][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 9.062 | 2.328 | tNET | FF | 1 | R35C43[0][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0/CLK |
| 8.798 | -0.263 | tSu | 1 | R35C43[0][A] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_0_s0 |
Path Statistics:
| Clock Skew | -0.018 |
| Setup Relationship | 6.734 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 2.346, 100.000% |
| Arrival Data Path Delay | cell: 0.342, 6.790%; route: 4.351, 86.376%; tC2Q: 0.344, 6.835% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 2.328, 100.000% |
Path4
Path Summary:
| Slack | 1.422 |
| Data Arrival Time | 7.376 |
| Data Required Time | 8.798 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0 |
| To | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[F] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | 1 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/CLK |
| 2.690 | 0.344 | tC2Q | RR | 3 | R34C37[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_final_out_inst/locked_s0/Q |
| 3.039 | 0.349 | tNET | RR | 1 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/I1 |
| 3.381 | 0.342 | tINS | RF | 486 | R33C39[2][B] | sdi_audio_buffer_pro_tx_inst/n6_s1/F |
| 7.376 | 3.995 | tNET | FF | 1 | R36C43[1][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 9.062 | 2.328 | tNET | FF | 1 | R36C43[1][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0/CLK |
| 8.798 | -0.263 | tSu | 1 | R36C43[1][B] | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_w_1_s0 |
Path Statistics:
| Clock Skew | -0.018 |
| Setup Relationship | 6.734 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 2.346, 100.000% |
| Arrival Data Path Delay | cell: 0.342, 6.799%; route: 4.344, 86.358%; tC2Q: 0.344, 6.843% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 2.328, 100.000% |
Path5
Path Summary:
| Slack | 4.197 |
| Data Arrival Time | 11.091 |
| Data Required Time | 15.288 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_2_s |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 11.091 | 2.060 | tNET | FF | 16 | BSRAM_R56[11][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_2_s/RESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | BSRAM_R56[11][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_2_s/CLKB |
| 15.288 | -0.072 | tSu | 1 | BSRAM_R56[11][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_2_s |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 2.060, 83.799%; tC2Q: 0.398, 16.201% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path6
Path Summary:
| Slack | 4.366 |
| Data Arrival Time | 10.673 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_0_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.673 | 1.641 | tNET | FF | 1 | R66C72[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_0_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R66C72[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_0_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R66C72[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_0_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.641, 80.474%; tC2Q: 0.398, 19.526% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path7
Path Summary:
| Slack | 4.366 |
| Data Arrival Time | 10.673 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_3_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.673 | 1.641 | tNET | FF | 1 | R66C72[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_3_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R66C72[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_3_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R66C72[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_3_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.641, 80.474%; tC2Q: 0.398, 19.526% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path8
Path Summary:
| Slack | 4.366 |
| Data Arrival Time | 10.673 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_0_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.673 | 1.641 | tNET | FF | 1 | R66C72[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_0_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R66C72[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_0_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R66C72[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_0_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.641, 80.474%; tC2Q: 0.398, 19.526% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path9
Path Summary:
| Slack | 4.366 |
| Data Arrival Time | 10.673 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_2_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.673 | 1.641 | tNET | FF | 1 | R66C72[1][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_2_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R66C72[1][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_2_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R66C72[1][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_2_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.641, 80.474%; tC2Q: 0.398, 19.526% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path10
Path Summary:
| Slack | 4.366 |
| Data Arrival Time | 10.673 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_0_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.673 | 1.641 | tNET | FF | 1 | R66C72[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_0_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R66C72[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_0_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R66C72[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_0_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.641, 80.474%; tC2Q: 0.398, 19.526% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path11
Path Summary:
| Slack | 4.366 |
| Data Arrival Time | 10.673 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_2_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.673 | 1.641 | tNET | FF | 1 | R66C72[3][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_2_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R66C72[3][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_2_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R66C72[3][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_2_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.641, 80.474%; tC2Q: 0.398, 19.526% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path12
Path Summary:
| Slack | 4.370 |
| Data Arrival Time | 10.926 |
| Data Required Time | 15.296 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_2_s |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.926 | 1.894 | tNET | FF | 16 | BSRAM_R56[11][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_2_s/RESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | BSRAM_R56[11][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_2_s/CLKB |
| 15.296 | -0.072 | tSu | 1 | BSRAM_R56[11][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.mem_Equal.mem_0_2_s |
Path Statistics:
| Clock Skew | 0.001 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.894, 82.630%; tC2Q: 0.398, 17.370% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path13
Path Summary:
| Slack | 4.547 |
| Data Arrival Time | 10.491 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_4_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.491 | 1.460 | tNET | FF | 1 | R68C72[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_4_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R68C72[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_4_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R68C72[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_4_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.460, 78.571%; tC2Q: 0.398, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path14
Path Summary:
| Slack | 4.547 |
| Data Arrival Time | 10.491 |
| Data Required Time | 15.039 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_4_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.491 | 1.460 | tNET | FF | 1 | R68C72[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_4_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.351 | 1.883 | tNET | RR | 1 | R68C72[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_4_s0/CLK |
| 15.038 | -0.313 | tSu | 1 | R68C72[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_4_s0 |
Path Statistics:
| Clock Skew | -0.016 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.460, 78.571%; tC2Q: 0.398, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.883, 100.000% |
Path15
Path Summary:
| Slack | 4.555 |
| Data Arrival Time | 10.491 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_2_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.491 | 1.460 | tNET | FF | 1 | R68C71[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_2_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R68C71[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_2_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R68C71[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rptr_2_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.460, 78.571%; tC2Q: 0.398, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path16
Path Summary:
| Slack | 4.555 |
| Data Arrival Time | 10.491 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_3_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.491 | 1.460 | tNET | FF | 1 | R68C71[3][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_3_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R68C71[3][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_3_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R68C71[3][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_3_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.460, 78.571%; tC2Q: 0.398, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path17
Path Summary:
| Slack | 4.555 |
| Data Arrival Time | 10.491 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_5_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.491 | 1.460 | tNET | FF | 1 | R68C71[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_5_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R68C71[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_5_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R68C71[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_5_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.460, 78.571%; tC2Q: 0.398, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path18
Path Summary:
| Slack | 4.555 |
| Data Arrival Time | 10.491 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_3_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.491 | 1.460 | tNET | FF | 1 | R68C71[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_3_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R68C71[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_3_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R68C71[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_3_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.460, 78.571%; tC2Q: 0.398, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path19
Path Summary:
| Slack | 4.555 |
| Data Arrival Time | 10.491 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_5_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.491 | 1.460 | tNET | FF | 1 | R68C71[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_5_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R68C71[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_5_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R68C71[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_5_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.460, 78.571%; tC2Q: 0.398, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path20
Path Summary:
| Slack | 4.753 |
| Data Arrival Time | 10.302 |
| Data Required Time | 15.055 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Empty_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.302 | 1.271 | tNET | FF | 1 | R67C70[1][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Empty_s0/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R67C70[1][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Empty_s0/CLK |
| 15.055 | -0.313 | tSu | 1 | R67C70[1][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Empty_s0 |
Path Statistics:
| Clock Skew | 0.001 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.271, 76.146%; tC2Q: 0.398, 23.854% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path21
Path Summary:
| Slack | 4.753 |
| Data Arrival Time | 10.302 |
| Data Required Time | 15.055 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_6_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.302 | 1.271 | tNET | FF | 1 | R67C70[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_6_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R67C70[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_6_s0/CLK |
| 15.055 | -0.313 | tSu | 1 | R67C70[1][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq2_wptr_6_s0 |
Path Statistics:
| Clock Skew | 0.001 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.271, 76.146%; tC2Q: 0.398, 23.854% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path22
Path Summary:
| Slack | 4.753 |
| Data Arrival Time | 10.302 |
| Data Required Time | 15.055 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_6_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.302 | 1.271 | tNET | FF | 1 | R67C70[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_6_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.368 | 1.900 | tNET | RR | 1 | R67C70[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_6_s0/CLK |
| 15.055 | -0.313 | tSu | 1 | R67C70[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/Equal.rq1_wptr_6_s0 |
Path Statistics:
| Clock Skew | 0.001 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.271, 76.146%; tC2Q: 0.398, 23.854% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.900, 100.000% |
Path23
Path Summary:
| Slack | 4.875 |
| Data Arrival Time | 10.172 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_0_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.172 | 1.141 | tNET | FF | 1 | R64C71[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_0_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R64C71[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_0_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R64C71[0][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_0_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.141, 74.123%; tC2Q: 0.398, 25.877% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path24
Path Summary:
| Slack | 4.875 |
| Data Arrival Time | 10.172 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_1_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.172 | 1.141 | tNET | FF | 1 | R64C71[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_1_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R64C71[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_1_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R64C71[0][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_1_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.141, 74.123%; tC2Q: 0.398, 25.877% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Path25
Path Summary:
| Slack | 4.875 |
| Data Arrival Time | 10.172 |
| Data Required Time | 15.047 |
| From | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0 |
| To | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_4_s0 |
| Launch Clk | sdi_phy_tx_clk:[F] |
| Latch Clk | sdi_phy_tx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 6.734 | 6.734 | active clock edge time | ||||
| 6.734 | 0.000 | sdi_phy_tx_clk | ||||
| 6.734 | 0.000 | tCL | FF | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 8.633 | 1.899 | tNET | FF | 1 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/CLK |
| 9.031 | 0.398 | tC2Q | FF | 34 | R57C70[2][A] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/reset_r_1_s0/Q |
| 10.172 | 1.141 | tNET | FF | 1 | R64C71[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_4_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 13.468 | 13.468 | active clock edge time | ||||
| 13.468 | 0.000 | sdi_phy_tx_clk | ||||
| 13.468 | 0.000 | tCL | RR | 3845 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_TX_O_FABRIC_CLK |
| 15.360 | 1.892 | tNET | RR | 1 | R64C71[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_4_s0/CLK |
| 15.047 | -0.313 | tSu | 1 | R64C71[2][B] | sdi_audio_buffer_pro_tx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/rbin_num_4_s0 |
Path Statistics:
| Clock Skew | -0.007 |
| Setup Relationship | 6.734 |
| Logic Level | 1 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 1.899, 100.000% |
| Arrival Data Path Delay | cell: 0.000, 0.000%; route: 1.141, 74.123%; tC2Q: 0.398, 25.877% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 1.892, 100.000% |
Removal Analysis Report
Report Command:report_timing -removal -max_paths 25 -max_common_paths 1
Path1
Path Summary:
| Slack | 0.467 |
| Data Arrival Time | 1.031 |
| Data Required Time | 0.564 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R48C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0/CLK |
| 0.734 | 0.130 | tC2Q | RR | 5 | R48C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0/Q |
| 0.830 | 0.095 | tNET | RR | 1 | R48C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n74_s1/I1 |
| 0.961 | 0.131 | tINS | RR | 1 | R48C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n74_s1/F |
| 1.031 | 0.070 | tNET | RR | 1 | R48C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s1/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R48C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s1/CLK |
| 0.564 | -0.048 | tHld | 1 | R48C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s1 |
Path Statistics:
| Clock Skew | 0.007 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.131, 30.802%; route: 0.166, 38.819%; tC2Q: 0.130, 30.380% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
Path2
Path Summary:
| Slack | 0.475 |
| Data Arrival Time | 1.039 |
| Data Required Time | 0.564 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_19_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_9_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R50C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_19_s0/CLK |
| 0.742 | 0.130 | tC2Q | RR | 5 | R50C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_19_s0/Q |
| 0.838 | 0.096 | tNET | RR | 1 | R48C49[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n42_s1/I1 |
| 0.969 | 0.131 | tINS | RR | 1 | R48C49[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n42_s1/F |
| 1.039 | 0.070 | tNET | RR | 1 | R48C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_9_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R48C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_9_s0/CLK |
| 0.564 | -0.048 | tHld | 1 | R48C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_9_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.131, 30.737%; route: 0.166, 38.947%; tC2Q: 0.130, 30.316% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
Path3
Path Summary:
| Slack | 0.526 |
| Data Arrival Time | 1.087 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R48C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0/CLK |
| 0.734 | 0.130 | tC2Q | RR | 5 | R48C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0/Q |
| 0.833 | 0.099 | tNET | RR | 1 | R48C46[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n78_s1/I1 |
| 1.017 | 0.184 | tINS | RR | 1 | R48C46[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n78_s1/F |
| 1.087 | 0.070 | tNET | RR | 1 | R48C46[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s1/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R48C46[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s1/CLK |
| 0.561 | -0.048 | tHld | 1 | R48C46[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s1 |
Path Statistics:
| Clock Skew | 0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.184, 38.060%; route: 0.169, 35.075%; tC2Q: 0.130, 26.866% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path4
Path Summary:
| Slack | 0.526 |
| Data Arrival Time | 1.087 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R48C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0/CLK |
| 0.734 | 0.130 | tC2Q | RR | 5 | R48C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_10_s0/Q |
| 0.833 | 0.099 | tNET | RR | 1 | R48C46[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n80_s1/I1 |
| 1.017 | 0.184 | tINS | RR | 1 | R48C46[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n80_s1/F |
| 1.087 | 0.070 | tNET | RR | 1 | R48C46[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R48C46[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s0/CLK |
| 0.561 | -0.048 | tHld | 1 | R48C46[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_0_s0 |
Path Statistics:
| Clock Skew | 0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.184, 38.060%; route: 0.169, 35.075%; tC2Q: 0.130, 26.866% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path5
Path Summary:
| Slack | 0.546 |
| Data Arrival Time | 1.107 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R50C48[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 5 | R50C48[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0/Q |
| 0.904 | 0.166 | tNET | RR | 1 | R48C48[3][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n58_s1/I1 |
| 1.037 | 0.133 | tINS | RR | 1 | R48C48[3][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n58_s1/F |
| 1.107 | 0.070 | tNET | RR | 1 | R48C48[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s1/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R48C48[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s1/CLK |
| 0.561 | -0.048 | tHld | 1 | R48C48[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.133, 26.715%; route: 0.236, 47.292%; tC2Q: 0.130, 25.993% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path6
Path Summary:
| Slack | 0.549 |
| Data Arrival Time | 1.106 |
| Data Required Time | 0.557 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R49C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0/CLK |
| 0.732 | 0.127 | tC2Q | RF | 5 | R49C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0/Q |
| 0.802 | 0.070 | tNET | FF | 1 | R49C47[3][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n66_s1/I1 |
| 1.036 | 0.234 | tINS | FR | 1 | R49C47[3][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n66_s1/F |
| 1.106 | 0.070 | tNET | RR | 1 | R49C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s1/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R49C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s1/CLK |
| 0.557 | -0.048 | tHld | 1 | R49C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.234, 46.679%; route: 0.140, 28.007%; tC2Q: 0.127, 25.314% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
Path7
Path Summary:
| Slack | 0.558 |
| Data Arrival Time | 1.122 |
| Data Required Time | 0.564 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R50C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0/CLK |
| 0.739 | 0.127 | tC2Q | RF | 5 | R50C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0/Q |
| 0.809 | 0.070 | tNET | FF | 1 | R50C49[3][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n56_s1/I1 |
| 1.052 | 0.243 | tINS | FR | 1 | R50C49[3][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n56_s1/F |
| 1.122 | 0.070 | tNET | RR | 1 | R50C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R50C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s0/CLK |
| 0.564 | -0.048 | tHld | 1 | R50C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.243, 47.619%; route: 0.140, 27.513%; tC2Q: 0.127, 24.868% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
Path8
Path Summary:
| Slack | 0.564 |
| Data Arrival Time | 1.129 |
| Data Required Time | 0.564 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_12_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_2_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R49C48[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_12_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 5 | R49C48[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_12_s0/Q |
| 0.830 | 0.092 | tNET | RR | 1 | R49C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n72_s1/I1 |
| 1.058 | 0.229 | tINS | RR | 1 | R49C49[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n72_s1/F |
| 1.129 | 0.070 | tNET | RR | 1 | R49C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_2_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R49C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_2_s0/CLK |
| 0.564 | -0.048 | tHld | 1 | R49C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_2_s0 |
Path Statistics:
| Clock Skew | 0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 43.945%; route: 0.162, 31.142%; tC2Q: 0.130, 24.913% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
Path9
Path Summary:
| Slack | 0.568 |
| Data Arrival Time | 1.125 |
| Data Required Time | 0.557 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R49C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0/CLK |
| 0.734 | 0.130 | tC2Q | RR | 5 | R49C47[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_13_s0/Q |
| 0.826 | 0.092 | tNET | RR | 1 | R48C47[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n68_s1/I1 |
| 1.055 | 0.229 | tINS | RR | 1 | R48C47[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n68_s1/F |
| 1.125 | 0.070 | tNET | RR | 1 | R48C47[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R48C47[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s0/CLK |
| 0.557 | -0.048 | tHld | 1 | R48C47[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_3_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 43.945%; route: 0.162, 31.142%; tC2Q: 0.130, 24.913% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
Path10
Path Summary:
| Slack | 0.568 |
| Data Arrival Time | 1.129 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R50C48[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 5 | R50C48[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0/Q |
| 0.830 | 0.092 | tNET | RR | 1 | R49C48[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n62_s1/I1 |
| 1.058 | 0.229 | tINS | RR | 1 | R49C48[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n62_s1/F |
| 1.129 | 0.070 | tNET | RR | 1 | R49C48[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s1/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R49C48[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s1/CLK |
| 0.561 | -0.048 | tHld | 1 | R49C48[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 43.945%; route: 0.162, 31.142%; tC2Q: 0.130, 24.913% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path11
Path Summary:
| Slack | 0.571 |
| Data Arrival Time | 1.132 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R50C48[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 5 | R50C48[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_15_s0/Q |
| 0.833 | 0.095 | tNET | RR | 1 | R48C48[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n60_s1/I1 |
| 1.062 | 0.229 | tINS | RR | 1 | R48C48[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n60_s1/F |
| 1.132 | 0.070 | tNET | RR | 1 | R48C48[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R48C48[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s0/CLK |
| 0.561 | -0.048 | tHld | 1 | R48C48[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_5_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 43.643%; route: 0.166, 31.615%; tC2Q: 0.130, 24.742% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path12
Path Summary:
| Slack | 0.571 |
| Data Arrival Time | 1.132 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_17_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_7_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R50C49[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_17_s0/CLK |
| 0.742 | 0.130 | tC2Q | RR | 5 | R50C49[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_17_s0/Q |
| 0.833 | 0.092 | tNET | RR | 1 | R50C50[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n52_s1/I1 |
| 1.062 | 0.229 | tINS | RR | 1 | R50C50[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n52_s1/F |
| 1.132 | 0.070 | tNET | RR | 1 | R50C50[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_7_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R50C50[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_7_s0/CLK |
| 0.561 | -0.048 | tHld | 1 | R50C50[0][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_7_s0 |
Path Statistics:
| Clock Skew | -0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 43.945%; route: 0.162, 31.142%; tC2Q: 0.130, 24.913% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path13
Path Summary:
| Slack | 0.573 |
| Data Arrival Time | 1.130 |
| Data Required Time | 0.557 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R50C48[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0/CLK |
| 0.738 | 0.130 | tC2Q | RR | 5 | R50C48[0][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_14_s0/Q |
| 0.832 | 0.094 | tNET | RR | 1 | R50C47[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n64_s1/I1 |
| 1.060 | 0.229 | tINS | RR | 1 | R50C47[2][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n64_s1/F |
| 1.130 | 0.070 | tNET | RR | 1 | R50C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R50C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s0/CLK |
| 0.557 | -0.048 | tHld | 1 | R50C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_4_s0 |
Path Statistics:
| Clock Skew | -0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 43.793%; route: 0.164, 31.379%; tC2Q: 0.130, 24.828% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
Path14
Path Summary:
| Slack | 0.582 |
| Data Arrival Time | 1.147 |
| Data Required Time | 0.564 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R50C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0/CLK |
| 0.742 | 0.130 | tC2Q | RR | 5 | R50C49[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_16_s0/Q |
| 0.833 | 0.092 | tNET | RR | 1 | R49C49[3][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n54_s1/I1 |
| 1.076 | 0.243 | tINS | RR | 1 | R49C49[3][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n54_s1/F |
| 1.147 | 0.070 | tNET | RR | 1 | R49C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s1/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R49C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s1/CLK |
| 0.564 | -0.048 | tHld | 1 | R49C49[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_6_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.243, 45.455%; route: 0.162, 30.303%; tC2Q: 0.130, 24.242% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
Path15
Path Summary:
| Slack | 0.602 |
| Data Arrival Time | 1.163 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.605 | 0.605 | tNET | RR | 1 | R48C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0/CLK |
| 0.734 | 0.130 | tC2Q | RR | 5 | R48C47[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_11_s0/Q |
| 0.909 | 0.175 | tNET | RR | 1 | R48C50[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n76_s1/I1 |
| 1.093 | 0.184 | tINS | RR | 1 | R48C50[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n76_s1/F |
| 1.163 | 0.070 | tNET | RR | 1 | R48C50[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R48C50[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s0/CLK |
| 0.561 | -0.048 | tHld | 1 | R48C50[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_1_s0 |
Path Statistics:
| Clock Skew | 0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.605, 100.000% |
| Arrival Data Path Delay | cell: 0.184, 32.903%; route: 0.245, 43.871%; tC2Q: 0.130, 23.226% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path16
Path Summary:
| Slack | 0.638 |
| Data Arrival Time | 1.373 |
| Data Required Time | 0.735 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/mem_cnt_1_s3 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.373 | 0.176 | tNET | RR | 1 | R31C24[0][A] | adv7513_iic_init_inst0/mem_cnt_1_s3/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R31C24[0][A] | adv7513_iic_init_inst0/mem_cnt_1_s3/CLK |
| 0.735 | -0.048 | tHld | 1 | R31C24[0][A] | adv7513_iic_init_inst0/mem_cnt_1_s3 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 38.720%; route: 0.235, 39.787%; tC2Q: 0.127, 21.494% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
Path17
Path Summary:
| Slack | 0.638 |
| Data Arrival Time | 1.373 |
| Data Required Time | 0.735 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/mem_cnt_2_s1 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.373 | 0.176 | tNET | RR | 1 | R31C24[1][A] | adv7513_iic_init_inst0/mem_cnt_2_s1/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R31C24[1][A] | adv7513_iic_init_inst0/mem_cnt_2_s1/CLK |
| 0.735 | -0.048 | tHld | 1 | R31C24[1][A] | adv7513_iic_init_inst0/mem_cnt_2_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 38.720%; route: 0.235, 39.787%; tC2Q: 0.127, 21.494% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
Path18
Path Summary:
| Slack | 0.649 |
| Data Arrival Time | 1.388 |
| Data Required Time | 0.739 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/mem_cnt_0_s3 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.388 | 0.190 | tNET | RR | 1 | R31C25[1][A] | adv7513_iic_init_inst0/mem_cnt_0_s3/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.787 | 0.787 | tNET | RR | 1 | R31C25[1][A] | adv7513_iic_init_inst0/mem_cnt_0_s3/CLK |
| 0.739 | -0.048 | tHld | 1 | R31C25[1][A] | adv7513_iic_init_inst0/mem_cnt_0_s3 |
Path Statistics:
| Clock Skew | 0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 37.798%; route: 0.249, 41.220%; tC2Q: 0.127, 20.982% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.787, 100.000% |
Path19
Path Summary:
| Slack | 0.649 |
| Data Arrival Time | 1.388 |
| Data Required Time | 0.739 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/O_RX_EN_s2 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.388 | 0.190 | tNET | RR | 1 | R31C25[2][B] | adv7513_iic_init_inst0/O_RX_EN_s2/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.787 | 0.787 | tNET | RR | 1 | R31C25[2][B] | adv7513_iic_init_inst0/O_RX_EN_s2/CLK |
| 0.739 | -0.048 | tHld | 1 | R31C25[2][B] | adv7513_iic_init_inst0/O_RX_EN_s2 |
Path Statistics:
| Clock Skew | 0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 37.798%; route: 0.249, 41.220%; tC2Q: 0.127, 20.982% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.787, 100.000% |
Path20
Path Summary:
| Slack | 0.656 |
| Data Arrival Time | 1.217 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s0 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R50C49[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0/CLK |
| 0.742 | 0.130 | tC2Q | RR | 5 | R50C49[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0/Q |
| 0.918 | 0.176 | tNET | RR | 1 | R49C50[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n48_s1/I1 |
| 1.147 | 0.229 | tINS | RR | 1 | R49C50[2][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n48_s1/F |
| 1.217 | 0.070 | tNET | RR | 1 | R49C50[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R49C50[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s0/CLK |
| 0.561 | -0.048 | tHld | 1 | R49C50[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s0 |
Path Statistics:
| Clock Skew | -0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 37.798%; route: 0.247, 40.774%; tC2Q: 0.130, 21.429% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Path21
Path Summary:
| Slack | 0.656 |
| Data Arrival Time | 1.391 |
| Data Required Time | 0.735 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/mem_cnt_7_s1 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.391 | 0.194 | tNET | RR | 1 | R30C24[0][B] | adv7513_iic_init_inst0/mem_cnt_7_s1/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R30C24[0][B] | adv7513_iic_init_inst0/mem_cnt_7_s1/CLK |
| 0.735 | -0.048 | tHld | 1 | R30C24[0][B] | adv7513_iic_init_inst0/mem_cnt_7_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 37.574%; route: 0.253, 41.568%; tC2Q: 0.127, 20.858% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
Path22
Path Summary:
| Slack | 0.656 |
| Data Arrival Time | 1.391 |
| Data Required Time | 0.735 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/mem_cnt_3_s1 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.391 | 0.194 | tNET | RR | 1 | R30C24[3][A] | adv7513_iic_init_inst0/mem_cnt_3_s1/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R30C24[3][A] | adv7513_iic_init_inst0/mem_cnt_3_s1/CLK |
| 0.735 | -0.048 | tHld | 1 | R30C24[3][A] | adv7513_iic_init_inst0/mem_cnt_3_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 37.574%; route: 0.253, 41.568%; tC2Q: 0.127, 20.858% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
Path23
Path Summary:
| Slack | 0.656 |
| Data Arrival Time | 1.391 |
| Data Required Time | 0.735 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/mem_cnt_6_s1 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.391 | 0.194 | tNET | RR | 1 | R30C24[0][A] | adv7513_iic_init_inst0/mem_cnt_6_s1/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R30C24[0][A] | adv7513_iic_init_inst0/mem_cnt_6_s1/CLK |
| 0.735 | -0.048 | tHld | 1 | R30C24[0][A] | adv7513_iic_init_inst0/mem_cnt_6_s1 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 37.574%; route: 0.253, 41.568%; tC2Q: 0.127, 20.858% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
Path24
Path Summary:
| Slack | 0.656 |
| Data Arrival Time | 1.391 |
| Data Required Time | 0.735 |
| From | adv7513_rst_inst/rst_1_s0 |
| To | adv7513_iic_init_inst0/state_2_s0 |
| Launch Clk | sclk:[R] |
| Latch Clk | sclk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/CLK |
| 0.910 | 0.127 | tC2Q | RF | 1 | R33C24[3][A] | adv7513_rst_inst/rst_1_s0/Q |
| 0.969 | 0.059 | tNET | FF | 1 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/I1 |
| 1.198 | 0.229 | tINS | FR | 37 | R33C24[2][B] | adv7513_iic_init_inst0/n531_s1/F |
| 1.391 | 0.194 | tNET | RR | 1 | R30C24[1][A] | adv7513_iic_init_inst0/state_2_s0/CLEAR |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sclk | ||||
| 0.000 | 0.000 | tCL | RR | 240 | PLL_T[0] | sys_pll_inst/u_pll/PLLA_inst/CLKOUT0 |
| 0.783 | 0.783 | tNET | RR | 1 | R30C24[1][A] | adv7513_iic_init_inst0/state_2_s0/CLK |
| 0.735 | -0.048 | tHld | 1 | R30C24[1][A] | adv7513_iic_init_inst0/state_2_s0 |
Path Statistics:
| Clock Skew | 0.000 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
| Arrival Data Path Delay | cell: 0.229, 37.574%; route: 0.253, 41.568%; tC2Q: 0.127, 20.858% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.783, 100.000% |
Path25
Path Summary:
| Slack | 0.661 |
| Data Arrival Time | 1.222 |
| Data Required Time | 0.561 |
| From | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0 |
| To | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s1 |
| Launch Clk | sdi_phy_rx_clk:[R] |
| Latch Clk | sdi_phy_rx_clk:[R] |
Data Arrival Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.612 | 0.612 | tNET | RR | 1 | R50C49[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0/CLK |
| 0.742 | 0.130 | tC2Q | RR | 5 | R50C49[1][B] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/align_data_d1_18_s0/Q |
| 0.918 | 0.176 | tNET | RR | 1 | R50C50[3][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n46_s1/I1 |
| 1.152 | 0.234 | tINS | RR | 1 | R50C50[3][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/n46_s1/F |
| 1.222 | 0.070 | tNET | RR | 1 | R50C50[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s1/PRESET |
Data Required Path:
| AT | DELAY | TYPE | RF | FANOUT | LOC | NODE |
|---|---|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||||
| 0.000 | 0.000 | tCL | RR | 3517 | R2C2 | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 0.608 | 0.608 | tNET | RR | 1 | R50C50[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s1/CLK |
| 0.561 | -0.048 | tHld | 1 | R50C50[1][A] | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_sd_allign_patch_inst/datas1_d1_8_s1 |
Path Statistics:
| Clock Skew | -0.004 |
| Hold Relationship | 0.000 |
| Logic Level | 2 |
| Arrival Clock Path Delay | cell: 0.000, 0.000%; route: 0.612, 100.000% |
| Arrival Data Path Delay | cell: 0.234, 38.348%; route: 0.247, 40.413%; tC2Q: 0.130, 21.239% |
| Required Clock Path Delay | cell: 0.000, 0.000%; route: 0.608, 100.000% |
Minimum Pulse Width Report:
Report Command:report_min_pulse_width -nworst 10 -detail
MPW1
MPW Summary:
| Slack: | 4.279 |
| Actual Width: | 5.179 |
| Required Width: | 0.900 |
| Type: | Low Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 9.078 | 2.344 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0/CLKB |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 13.468 | 0.000 | active clock edge time | ||
| 13.468 | 0.000 | sdi_phy_rx_clk | ||
| 13.468 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 14.257 | 0.789 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0/CLKB |
MPW2
MPW Summary:
| Slack: | 4.279 |
| Actual Width: | 5.179 |
| Required Width: | 0.900 |
| Type: | Low Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 9.078 | 2.344 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2/CLKA |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 13.468 | 0.000 | active clock edge time | ||
| 13.468 | 0.000 | sdi_phy_rx_clk | ||
| 13.468 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 14.257 | 0.789 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2/CLKA |
MPW3
MPW Summary:
| Slack: | 4.279 |
| Actual Width: | 5.179 |
| Required Width: | 0.900 |
| Type: | Low Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 9.078 | 2.344 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4/CLKB |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 13.468 | 0.000 | active clock edge time | ||
| 13.468 | 0.000 | sdi_phy_rx_clk | ||
| 13.468 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 14.257 | 0.789 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4/CLKB |
MPW4
MPW Summary:
| Slack: | 4.279 |
| Actual Width: | 5.179 |
| Required Width: | 0.900 |
| Type: | Low Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 9.078 | 2.344 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5/CLKA |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 13.468 | 0.000 | active clock edge time | ||
| 13.468 | 0.000 | sdi_phy_rx_clk | ||
| 13.468 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 14.257 | 0.789 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5/CLKA |
MPW5
MPW Summary:
| Slack: | 4.279 |
| Actual Width: | 5.179 |
| Required Width: | 0.900 |
| Type: | Low Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 9.078 | 2.344 | tNET | FF | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s/CLKA |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 13.468 | 0.000 | active clock edge time | ||
| 13.468 | 0.000 | sdi_phy_rx_clk | ||
| 13.468 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 14.257 | 0.789 | tNET | RR | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s/CLKA |
MPW6
MPW Summary:
| Slack: | 4.282 |
| Actual Width: | 5.182 |
| Required Width: | 0.900 |
| Type: | High Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||
| 0.000 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0/CLKB |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 7.528 | 0.794 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_0/CLKB |
MPW7
MPW Summary:
| Slack: | 4.282 |
| Actual Width: | 5.182 |
| Required Width: | 0.900 |
| Type: | High Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||
| 0.000 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2/CLKA |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 7.528 | 0.794 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_2/CLKA |
MPW8
MPW Summary:
| Slack: | 4.282 |
| Actual Width: | 5.182 |
| Required Width: | 0.900 |
| Type: | High Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||
| 0.000 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4/CLKB |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 7.528 | 0.794 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_4/CLKB |
MPW9
MPW Summary:
| Slack: | 4.282 |
| Actual Width: | 5.182 |
| Required Width: | 0.900 |
| Type: | High Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5 |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||
| 0.000 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5/CLKA |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 7.528 | 0.794 | tNET | FF | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/rx_hd_level_b_dl_wrapper_inst/rx_hd_type2_to_type1_inst/rx_hd_lbdl_sdpb_even_inst0/sdpx9b_inst_5/CLKA |
MPW10
MPW Summary:
| Slack: | 4.282 |
| Actual Width: | 5.182 |
| Required Width: | 0.900 |
| Type: | High Pulse Width |
| Clock: | sdi_phy_rx_clk |
| Objects: | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s |
Late clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 0.000 | 0.000 | active clock edge time | ||
| 0.000 | 0.000 | sdi_phy_rx_clk | ||
| 0.000 | 0.000 | tCL | RR | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 2.346 | 2.346 | tNET | RR | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s/CLKA |
Early clock Path:
| AT | DELAY | TYPE | RF | NODE |
|---|---|---|---|---|
| 6.734 | 0.000 | active clock edge time | ||
| 6.734 | 0.000 | sdi_phy_rx_clk | ||
| 6.734 | 0.000 | tCL | FF | SerDes_Top_inst/gtr12_quad_inst0/LANE2_PCS_RX_O_FABRIC_CLK |
| 7.528 | 0.794 | tNET | FF | sdi_audio_buffer_pro_rx_inst/sdi_audio_buffer_fifo_inst/fifo_inst/gowin_add_SDPB_Equal.mem_Equal.mem_0_1_s/CLKA |
High Fanout Nets Report:
Report Command:report_high_fanout_nets -max_nets 10
| FANOUT | NET NAME | WORST SLACK | MAX DELAY |
|---|---|---|---|
| 3845 | sdi_phy_tx_clk | 5.404 | 2.346 |
| 3603 | rst_n1 | 15.145 | 3.179 |
| 3517 | sdi_phy_rx_clk | 1.024 | 2.346 |
| 486 | n6_5 | 1.024 | 4.010 |
| 388 | sdi_phy_drp_clk | 9.986 | 5.034 |
| 252 | pll_mdclk | 42.582 | 2.964 |
| 240 | sclk | 14.130 | 2.343 |
| 173 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_sd_wrapper_inst/rx_link_data_align_20bit_sd/gowin_reg_sd_locked_1 | 10.020 | 2.044 |
| 155 | audio_ref_clk_div4 | 321.306 | 2.343 |
| 141 | SDI_Decoder_Top_inst/sdi_decoder_wrapper_inst/rx_hd_level_a_b_dl_wrapper_inst/gowin_reg_hd_level_a_b_dl_locked_1 | 8.969 | 1.987 |
Route Congestions Report:
Report Command:report_route_congestion -max_grids 10
| GRID LOC | ROUTE CONGESTIONS |
|---|---|
| R35C77 | 88.89% |
| R33C76 | 81.94% |
| R34C77 | 80.56% |
| R30C75 | 80.56% |
| R33C77 | 80.56% |
| R36C75 | 79.17% |
| R34C78 | 79.17% |
| R35C75 | 76.39% |
| R30C79 | 76.39% |
| R33C75 | 76.39% |
Timing Exceptions Report:
Setup Analysis Report
Report Command:report_exceptions -setup -max_paths 5 -max_common_paths 1
No timing exceptions to report!
Hold Analysis Report
Report Command:report_exceptions -hold -max_paths 5 -max_common_paths 1
No timing exceptions to report!
Recovery Analysis Report
Report Command:report_exceptions -recovery -max_paths 5 -max_common_paths 1
No timing exceptions to report!
Removal Analysis Report
Report Command:report_exceptions -removal -max_paths 5 -max_common_paths 1
No timing exceptions to report!
Timing Constraints Report:
| SDC Command Type | State | Detail Command |
|---|---|---|
| TC_CLOCK | Invalid | create_clock -name sdi_phy_drp_clk -period 10 -waveform {0 5} [get_nets {sdi_phy_drp_clk}] -add |
| TC_CLOCK | Actived | create_clock -name sclk -period 20 -waveform {0 10} [get_nets {sclk}] -add |
| TC_CLOCK | Actived | create_clock -name I_pcm2706_bclk -period 325.520 -waveform {0 162.76} [get_ports {I_pcm2706_bclk}] -add |
| TC_CLOCK | Actived | create_clock -name I_audio_refclk -period 81.380 -waveform {0 40.69} [get_ports {I_audio_refclk}] -add |
| TC_CLOCK | Actived | create_clock -name sdi_phy_drp_clk -period 15.625 -waveform {0 7.8125} [get_nets {sdi_phy_drp_clk}] -add |
| TC_CLOCK | Actived | create_clock -name sdi_phy_tx_clk -period 13.468 -waveform {0 6.734} [get_nets {sdi_phy_tx_clk}] -add |
| TC_CLOCK | Actived | create_clock -name sdi_phy_rx_clk -period 13.468 -waveform {0 6.734} [get_nets {sdi_phy_rx_clk}] -add |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sclk}] -to [get_clocks {sdi_phy_tx_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_tx_clk}] -to [get_clocks {sclk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sclk}] -to [get_clocks {sdi_phy_rx_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_rx_clk}] -to [get_clocks {sclk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sclk}] -to [get_clocks {sdi_phy_drp_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_drp_clk}] -to [get_clocks {sclk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_drp_clk}] -to [get_clocks {sdi_phy_rx_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_rx_clk}] -to [get_clocks {sdi_phy_drp_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_drp_clk}] -to [get_clocks {sdi_phy_tx_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_tx_clk}] -to [get_clocks {sdi_phy_drp_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_tx_clk}] -to [get_clocks {sdi_phy_rx_clk}] |
| TC_FALSE_PATH | Actived | set_false_path -from [get_clocks {sdi_phy_rx_clk}] -to [get_clocks {sdi_phy_tx_clk}] |