PnR Messages

Report Title PnR Report
Design File E:\myWork\IP\releaseVerify\version\1.9.12.01\Gowin_PCIe_SGDMA\Gowin_PCIe_SGDMA_RefDesign\project\impl\gwsynthesis\fpga_project.vg
Physical Constraints File E:\myWork\IP\releaseVerify\version\1.9.12.01\Gowin_PCIe_SGDMA\Gowin_PCIe_SGDMA_RefDesign\project\src\fpga_project.cst
Timing Constraints File E:\myWork\IP\releaseVerify\version\1.9.12.01\Gowin_PCIe_SGDMA\Gowin_PCIe_SGDMA_RefDesign\project\src\fpga_project.sdc
Tool Version V1.9.12.01 (64-bit)
Part Number GW5AT-LV60UG225C2/I1
Device GW5AT-60
Device Version B
Created Time Wed Jan 7 17:12:54 2026
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

PnR Details

Place & Route Process Running placement: Placement Phase 0: CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s Placement Phase 1: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s Placement Phase 2: CPU time = 0h 0m 36s, Elapsed time = 0h 0m 36s Placement Phase 3: CPU time = 0h 0m 11s, Elapsed time = 0h 0m 11s Total Placement: CPU time = 0h 0m 55s, Elapsed time = 0h 0m 55s Running routing: Routing Phase 0: CPU time = 0h 0m 0.01s, Elapsed time = 0h 0m 0.01s Routing Phase 1: CPU time = 0h 0m 53s, Elapsed time = 0h 0m 53s Routing Phase 2: CPU time = 0h 0m 0.332s, Elapsed time = 0h 0m 0.332s Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Total Routing: CPU time = 0h 0m 53s, Elapsed time = 0h 0m 53s Generate output files: CPU time = 0h 0m 8s, Elapsed time = 0h 0m 8s
Total Time and Memory Usage CPU time = 0h 1m 56s, Elapsed time = 0h 1m 56s, Peak memory usage = 2117MB

Resource

Resource Usage Summary:

Resource Usage Utilization
Logic 12573/59904 21%
    --LUT,ALU,ROM16 12573(11033 LUT, 1540 ALU, 0 ROM16) -
    --SSRAM(RAM16) 0 -
Register 14287/60228 24%
    --Logic Register as Latch 0/59904 0%
    --Logic Register as FF 14284/59904 24%
    --I/O Register as Latch 0/324 0%
    --I/O Register as FF 3/324 <1%
CLS 11626/29952 39%
I/O Port 11/113 10%
I/O Buf 10 -
    --Input Buf 7 -
    --Output Buf 3 -
    --Inout Buf 0 -
BSRAM 50 SDPB
38 SDPX9B
1 pROM
 76%
GTR12_QUADA 1/1 100%
GTR12_UPARA 1/1 100%
GTR12_PMACA 1/1 100%

I/O Bank Usage Summary:

I/O Bank UsageUtilization
bank 1 3/838%
bank 2 0/60%
bank 3 0/80%
bank 4 3/650%
bank 5 0/200%
bank 8 0/160%
bank 9 0/360%
bank 10 1/520%
bank 11 0/40%
bank 12 4/4100%

Clock Resource Usage Summary:

Clock Resource Usage Utilization
PRIMARY 8/8 100%
LW 8/8 100%
GCLK_PIN 2/28 8%
PLLA 1/8 13%

Global Clock Signals:

Signal Global Clock Location
clk_50m_d PRIMARY PTR1 PTR3
pcie_tl_drp_clk PRIMARY PTR0 PTR1 PTR2 PTR3 PBR0 PBR1 PBR2
gw_gao_inst_0/control0[0] PRIMARY PTR0 PTR1 PBR0 PBR1
u_PCIe_IP/PCIE_Controller_Top_pcie_half_clk_i PRIMARY PTR0
u_dut/top/u_tlp_tx_mux/n893_3 PRIMARY PBR1
u_dut/top/u_dma/u_h2c_all_engines/multi_engines_gen[0].u_h2c_engine/desc_cpld_tlp_rx_valid PRIMARY PTR2 PBR2
u_dut/top/u_dma/u_c2h_all_engines/cpld_tlp_rx_valid_int_Z[0] PRIMARY PTR1 PBR1
u_dut/top/u_dma/u_c2h_all_engines/u_c2h_all_engine_tlp_rx_demux/c2h_cpld_tlp_rx_ready PRIMARY PTR1 PBR1
pcie_rstn LW -
gw_gao_inst_0/gao_jtag_reset LW -
gw_gao_inst_0/u_la0_top/n20_3 LW -
gw_gao_inst_0/u_la0_top/data_out_shift_reg_534_9 LW -
u_dut/top/rstn LW -
u_dut/top/u_dma/control_rstn_Z LW -
u_dut/top/u_dma/u_h2c_all_engines/multi_engines_gen[0].u_h2c_engine/data_fifo_full LW -
u_dut/top/u_dma/u_c2h_all_engines/multi_engines_gen[0].u_c2h_engine/u_c2h_data/tlp_tx_data_int_383_6 LW -

Pinout by Port Name:

Port Name Diff Pair Loc./Bank Constraint Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Slew Rate Vref Single Resistor Diff Resistor BankVccio Pull Strength Ctle Threshold Offset
soc_pcie_rstn - H15/4 Y in IOR34[A] D13 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
clk_200m_p clk_200m_n G12/4 Y in IOR36[A] GCLKT_5/RPLL0_T_IN1/RPLL0_T_FB0 LVDS25 OFF NONE OFF NONE OFF SLOW OFF OFF ON 3.3 MEDIUM OFF OFF
clk_200m_n clk_200m_p H12/4 Y in IOR36[B] GCLKC_5/RPLL0_C_IN1/RPLL0_C_FB0 LVDS25 OFF NONE OFF NONE OFF SLOW OFF OFF ON 3.3 MEDIUM OFF OFF
clk_50m - H5/10 Y in IOL48[A] GCLKT_17 LVCMOS18 OFF NONE OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
uart_rx - E6/1 Y in IOT74[B] - LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
tms_pad_i - E15/12 N in IOR3[A] TMS LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
tck_pad_i - C15/12 N in IOR1[A] TCK LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
tdi_pad_i - B15/12 N in IOR1[B] TDI LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
uart_tx - E5/1 Y out IOT74[A] - LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE NONE
sysclk_o - F8/1 Y out IOT78[A] - LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE NONE
tdo_pad_o - D15/12 N out IOR3[B] TDO LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE NONE

All Package Pins:

Loc./Bank Signal Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Slew Rate Vref Single Resistor Diff Resistor Bank Vccio Pull Strength Ctle Threshold Offset
E5/1 uart_tx out IOT74[A] - LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE NONE
E6/1 uart_rx in IOT74[B] - LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
E7/1 - in IOT76[A] TPLL0_T_IN0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
E8/1 - in IOT76[B] TPLL0_C_IN0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F8/1 sysclk_o out IOT78[A] - LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE NONE
E9/1 - in IOT78[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F10/1 - in IOT89[A] GCLKT_1/Q0REF_T_IN0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
E10/1 - in IOT89[B] GCLKC_1/Q0REF_C_IN0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
B13/2 - in IOT142[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
A13/2 - out IOT142[B] DOUT LVCMOS33 8 UP OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE NONE
B14/2 - in IOT144[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
A14/2 - in IOT144[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
D13/2 - in IOT146[A] TPLL1_T_IN1/TPLL1_T_FB0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
C14/2 - in IOT146[B] TPLL1_C_IN1/TPLL1_C_FB0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L1/9 - in IOB1[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L2/9 - in IOB1[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M3/9 - in IOB3[A] BPLL0_T_IN1/BPLL0_T_FB0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L3/9 - in IOB3[B] BPLL0_C_IN1/BPLL0_C_FB0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M1/9 - in IOB5[A] BPLL0_T_IN2/BPLL0_T_FB1 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N2/9 - in IOB5[B] BPLL0_C_IN2/BPLL0_C_FB1 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N1/9 - in IOB7[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P1/9 - in IOB7[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R2/9 - in IOB9[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P2/9 - in IOB9[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R3/9 - in IOB12[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P3/9 - in IOB12[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N4/9 - in IOB14[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M4/9 - in IOB14[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P5/9 - in IOB16[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N5/9 - in IOB16[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M5/9 - in IOB18[A] GCLKT_12 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L5/9 - in IOB18[B] GCLKC_12 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R4/9 - in IOB20[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R5/9 - in IOB20[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R6/9 - in IOB22[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R7/9 - in IOB22[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N6/9 - in IOB24[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M6/9 - in IOB24[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R8/9 - in IOB26[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R9/9 - in IOB26[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P7/9 - in IOB29[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N7/9 - in IOB29[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N8/9 - in IOB31[A] GCLKT_14 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M8/9 - in IOB31[B] GCLKC_14 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P9/9 - in IOB33[A] GCLKT_15 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N9/9 - in IOB33[B] GCLKC_15 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L6/9 - in IOB35[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L7/9 - in IOB35[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M9/9 - in IOB38[A] GCLKT_13 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L8/9 - in IOB38[B] GCLKC_13 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L9/8 - in IOB75[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
K8/8 - in IOB75[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R10/8 - in IOB77[A] BPLL1_T_IN2/BPLL1_T_FB0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R11/8 - in IOB77[B] BPLL1_C_IN2/BPLL1_C_FB0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P11/8 - in IOB79[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N11/8 - in IOB79[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N10/8 - in IOB81[A] GCLKT_11 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M10/8 - in IOB81[B] GCLKC_11 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R13/8 - in IOB85[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R12/8 - in IOB85[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N12/8 - in IOB87[A] GCLKT_10 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M11/8 - in IOB87[B] GCLKC_10 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L10/8 - in IOB89[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
K10/8 - in IOB89[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
R14/8 - in IOB91[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P13/8 - in IOB91[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F5/11 - in IOL41[A] - LVCMOS18 OFF UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
G5/11 - in IOL41[B] - LVCMOS18 OFF UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
K4/11 - in IOL45[A] GCLKT_18 LVCMOS18 OFF UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
K3/11 - in IOL45[B] GCLKC_18 LVCMOS18 OFF UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
H5/10 clk_50m in IOL48[A] GCLKT_17 LVCMOS18 OFF NONE OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
H6/10 - in IOL48[B] GCLKC_17 LVCMOS18 OFF UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
K5/10 - in IOL50[A] GCLKT_16 LVCMOS18 OFF UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
J5/10 - in IOL50[B] GCLKC_16 LVCMOS18 OFF UP OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
K1/10 - in IOL66[A] PUDC_B/LPLL1_T_IN1/LPLL1_T_FB0 LVCMOS18 OFF DOWN OFF ON OFF SLOW OFF OFF OFF 1.8 MEDIUM NONE OFF
C15/12 tck_pad_i in IOR1[A] TCK LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
B15/12 tdi_pad_i in IOR1[B] TDI LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
E15/12 tms_pad_i in IOR3[A] TMS LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
D15/12 tdo_pad_o out IOR3[B] TDO LVCMOS33 8 NONE OFF OFF OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE NONE
E13/3 - in IOR5[A] CCLK LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
E14/3 - in IOR5[B] MODE0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F12/3 - in IOR9[A] D00/DIN/MISO/MI1 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F13/3 - in IOR9[B] CSI_B/MOSI/MI0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F11/3 - in IOR15[A] D11 LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
G11/3 - in IOR15[B] D12 LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F15/3 - in IOR17[A] MODE1/GCLKT_4 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
G15/3 - in IOR17[B] D10/GCLKC_4 LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
G13/4 - in IOR20[A] D01/MI2 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
G14/4 - in IOR20[B] D02/MI3 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
H15/4 soc_pcie_rstn in IOR34[A] D13 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
J15/4 - in IOR34[B] EMCCLK LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
G12/4 clk_200m_p in IOR36[A] GCLKT_5/RPLL0_T_IN1/RPLL0_T_FB0 LVDS25 OFF NONE OFF NONE OFF SLOW OFF OFF ON 3.3 MEDIUM OFF OFF
H12/4 clk_200m_n in IOR36[B] GCLKC_5/RPLL0_C_IN1/RPLL0_C_FB0 LVDS25 OFF NONE OFF NONE OFF SLOW OFF OFF ON 3.3 MEDIUM OFF OFF
H11/5 - in IOR41[A] D14/GCLKT_7 LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
H10/5 - in IOR41[B] D15/GCLKC_7 LVCMOS33 OFF NONE OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
H13/5 - in IOR47[A] DONE LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
K15/5 - in IOR56[A] RECONFIG_N LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
J13/5 - in IOR57[A] GCLKT_6 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
J14/5 - in IOR57[B] GCLKC_6 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
J11/5 - in IOR59[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
K11/5 - in IOR59[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
K12/5 - in IOR61[A] D07/SDA/RPLL1_T_IN2/RPLL1_T_FB0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
K13/5 - in IOR61[B] RDWR_B/SCL/RPLL1_C_IN2/RPLL1_C_FB0 LVCMOS33 OFF DOWN OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L13/5 - in IOR63[A] D03/SI/SSI0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L14/5 - in IOR63[B] D04/SSPI_CS_N LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L15/5 - in IOR66[A] D05/SO/SSI1/RPLL1_T_IN1/RPLL1_T_FB1 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M15/5 - in IOR66[B] D06/SSPI_CLK/RPLL1_C_IN1/RPLL1_C_FB1 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
L12/5 - in IOR68[A] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
M13/5 - in IOR68[B] - LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N14/5 - in IOR70[A] D08/SSPI_WPN/SSI2 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
N15/5 - in IOR70[B] D09/CLKHOLD_N/SSI3 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P14/5 - in IOR72[A] READY/RPLL1_T_IN0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
P15/5 - in IOR72[B] CSO_B/MCS_N/RPLL1_C_IN0 LVCMOS33 OFF UP OFF ON OFF SLOW OFF OFF OFF 3.3 MEDIUM NONE OFF
F3/MIPI - inout M0_CKN - - - - - - - - - - - - - - -
G3/MIPI - inout M0_CKP - - - - - - - - - - - - - - -
J3/MIPI - inout M0_D0N - - - - - - - - - - - - - - -
J4/MIPI - inout M0_D0P - - - - - - - - - - - - - - -
H3/MIPI - inout M0_D1N - - - - - - - - - - - - - - -
H4/MIPI - inout M0_D1P - - - - - - - - - - - - - - -
E3/MIPI - inout M0_D2N - - - - - - - - - - - - - - -
F4/MIPI - inout M0_D2P - - - - - - - - - - - - - - -
C2/MIPI - inout M0_D3N - - - - - - - - - - - - - - -
C1/MIPI - inout M0_D3P - - - - - - - - - - - - - - -
D1/MIPI - inout M1_D0A - - - - - - - - - - - - - - -
E2/MIPI - inout M1_D0B - - - - - - - - - - - - - - -
E1/MIPI - inout M1_D0C - - - - - - - - - - - - - - -
F1/MIPI - inout M1_D1A - - - - - - - - - - - - - - -
G1/MIPI - inout M1_D1B - - - - - - - - - - - - - - -
G2/MIPI - inout M1_D1C - - - - - - - - - - - - - - -
H1/MIPI - inout M1_D2A - - - - - - - - - - - - - - -
J1/MIPI - inout M1_D2B - - - - - - - - - - - - - - -
J2/MIPI - inout M1_D2C - - - - - - - - - - - - - - -
A3/Q0 - in Q0_LN0_RXM_I - - - - - - - - - - - - - - -
B3/Q0 - in Q0_LN0_RXP_I - - - - - - - - - - - - - - -
C4/Q0 - out Q0_LN0_TXM_O - - - - - - - - - - - - - - -
D4/Q0 - out Q0_LN0_TXP_O - - - - - - - - - - - - - - -
A7/Q0 - in Q0_LN1_RXM_I - - - - - - - - - - - - - - -
B7/Q0 - in Q0_LN1_RXP_I - - - - - - - - - - - - - - -
C6/Q0 - out Q0_LN1_TXM_O - - - - - - - - - - - - - - -
D6/Q0 - out Q0_LN1_TXP_O - - - - - - - - - - - - - - -
A9/Q0 - in Q0_LN2_RXM_I - - - - - - - - - - - - - - -
B9/Q0 - in Q0_LN2_RXP_I - - - - - - - - - - - - - - -
C8/Q0 - out Q0_LN2_TXM_O - - - - - - - - - - - - - - -
D8/Q0 - out Q0_LN2_TXP_O - - - - - - - - - - - - - - -
A11/Q0 - in Q0_LN3_RXM_I - - - - - - - - - - - - - - -
B11/Q0 - in Q0_LN3_RXP_I - - - - - - - - - - - - - - -
C12/Q0 - out Q0_LN3_TXM_O - - - - - - - - - - - - - - -
D12/Q0 - out Q0_LN3_TXP_O - - - - - - - - - - - - - - -
A5/Q0 - in Q0_REFCLKM_0 - - - - - - - - - - - - - - -
C10/Q0 - in Q0_REFCLKM_1 - - - - - - - - - - - - - - -
B5/Q0 - in Q0_REFCLKP_0 - - - - - - - - - - - - - - -
D10/Q0 - in Q0_REFCLKP_1 - - - - - - - - - - - - - - -