#Build: Synplify Pro (R) Q-2020.03G-Beta1, Build 136R, May 11 2020
#install: C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro
#OS: Windows 7 6.1
#Hostname: GW-SW-031
# Fri Nov 20 15:47:47 2020
#Implementation: rev_1
Copyright (C) 1994-2020 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03G-Beta1
Install: C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro
OS: Windows 6.1
Hostname: GW-SW-031
Implementation : rev_1
Synopsys HDL Compiler, Version comp202003syn, Build 137R, Built May 11 2020 09:06:37, @
@N: : | Running in 64-bit mode
###########################################################[
Copyright (C) 1994-2020 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03G-Beta1
Install: C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro
OS: Windows 6.1
Hostname: GW-SW-031
Implementation : rev_1
Synopsys Verilog Compiler, Version comp202003syn, Build 137R, Built May 11 2020 09:06:37, @
@N: : | Running in 64-bit mode
@N:CG1349 : | Running Verilog Compiler in System Verilog mode
@N:CG1350 : | Running Verilog Compiler in Multiple File Compilation Unit mode
@I::"C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro\lib\generic\gw2a.v" (library work)
@I::"C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro\lib\vlog\hypermods.v" (library __hyper__lib__)
@I::"C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro\lib\vlog\umr_capim.v" (library snps_haps)
@I::"C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro\lib\vlog\scemi_objects.v" (library snps_haps)
@I::"C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro\lib\vlog\scemi_pipes.svh" (library snps_haps)
@I::"E:\myWork\IP\releaseVerify\V1.9.7.01\Gowin_IIR_Filter_RefDesign\Ref_Design\src\exp_iir.v" (library work)
@I::"E:\myWork\IP\releaseVerify\V1.9.7.01\Gowin_IIR_Filter_RefDesign\Ref_Design\src\iir_filter\iir_filter.v" (library work)
@W:CG1347 : iir_filter.v(7066) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(7066) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(7075) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(6929) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(6921) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(9703) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(9703) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(9712) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20158) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20166) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20174) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20182) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20190) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20198) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20206) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20214) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20222) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20230) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20238) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20246) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20254) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20262) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20270) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20278) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20286) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20294) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20158) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20302) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20166) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20310) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20174) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20318) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20182) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20326) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20190) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20334) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20198) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20342) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20206) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20350) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20214) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20358) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20222) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20366) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20230) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20374) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20238) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20382) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20246) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20390) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20254) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20398) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20262) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20406) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20270) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20414) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20278) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20422) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20286) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20430) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20294) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20438) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20158) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20302) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20446) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20166) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20310) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20454) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20174) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20318) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20462) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20182) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20326) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20470) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20190) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20334) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20478) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20198) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20342) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20486) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20206) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20350) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20494) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20214) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20358) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20502) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20222) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20366) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20510) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20230) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20374) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20518) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20238) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20382) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20526) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20246) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20390) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20534) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20254) | Duplicate defparam INIT found ! Previously declared here.
@W:CG1347 : iir_filter.v(20398) | Duplicate defparam INIT found ! Previously declared here.
Only the first 100 messages of id 'CG1347' are reported. To see all messages use 'report_messages -log E:\myWork\IP\releaseVerify\V1.9.7.01\Gowin_IIR_Filter_RefDesign\Ref_Design\impl\synthesize\rev_1\synlog\Ref_Design_compiler.srr -id CG1347' in the Tcl shell. To see all messages in future runs, use the command 'message_override -limit {CG1347} -count unlimited' in the Tcl shell.
Verilog syntax check successful!
Selecting top level module exp_iir
@N:CG364 : gw2a.v(2406) | Synthesizing module GSR in library work.
Running optimization stage 1 on GSR .......
Running optimization stage 1 on MUX2_LUT5 .......
Running optimization stage 1 on MUX2_LUT6 .......
Running optimization stage 1 on LUT4 .......
Running optimization stage 1 on LUT3 .......
Running optimization stage 1 on LUT2 .......
Running optimization stage 1 on DFFCE .......
Running optimization stage 1 on DFFP .......
Running optimization stage 1 on DFFPE .......
Running optimization stage 1 on DFFC .......
Running optimization stage 1 on RAM16SDP4 .......
Running optimization stage 1 on ALU .......
Running optimization stage 1 on INV .......
Running optimization stage 1 on DFFE .......
Running optimization stage 1 on RAM16S4 .......
Running optimization stage 1 on GND .......
Running optimization stage 1 on VCC .......
Running optimization stage 1 on delay_3s_18s .......
Running optimization stage 1 on delay_1s_1s .......
Running optimization stage 1 on delay_4s_18s .......
Running optimization stage 1 on delay_4s_18s_0 .......
Running optimization stage 1 on DFFR .......
Running optimization stage 1 on DFFS .......
Running optimization stage 1 on SPX9 .......
Running optimization stage 1 on \singlerate_coeff_rom_coeff_a_in.dat_12s_18s .......
Running optimization stage 1 on \singlerate_coeff_rom_coeff_b_in.dat_12s_18s .......
Running optimization stage 1 on delay_2s_1s .......
Running optimization stage 1 on delay_2s_1s_0 .......
Running optimization stage 1 on delay_1s_4s .......
Running optimization stage 1 on shift_reg_6s_18s .......
Running optimization stage 1 on shift_reg_6s_18s_3 .......
Running optimization stage 1 on shift_reg_6s_18s_0 .......
Only the first 100 messages of id 'CG360' are reported. To see all messages use 'report_messages -log E:\myWork\IP\releaseVerify\V1.9.7.01\Gowin_IIR_Filter_RefDesign\Ref_Design\impl\synthesize\rev_1\synlog\Ref_Design_compiler.srr -id CG360' in the Tcl shell. To see all messages in future runs, use the command 'message_override -limit {CG360} -count unlimited' in the Tcl shell.
Running optimization stage 1 on shift_reg_6s_18s_3_0 .......
Running optimization stage 1 on delay_1s_18s .......
Running optimization stage 1 on delay_3s_18s_0 .......
Running optimization stage 1 on delay_3s_3s .......
Running optimization stage 1 on delay_1s_3s .......
Running optimization stage 1 on MULT18X18 .......
Running optimization stage 1 on dsp_Multiplier_18s_18s_36s .......
Running optimization stage 1 on dsp_Multiplier_18s_18s_36s_3 .......
Running optimization stage 1 on delay_1s_36s .......
Running optimization stage 1 on delay_1s_18s_0 .......
Running optimization stage 1 on delay_3s_18s_1 .......
Running optimization stage 1 on delay_1s_3s_0 .......
Running optimization stage 1 on delay_3s_3s_0 .......
Running optimization stage 1 on dsp_Multiplier_18s_18s_36s_0 .......
Running optimization stage 1 on dsp_Multiplier_18s_18s_36s_3_0 .......
Running optimization stage 1 on delay_1s_36s_0 .......
Running optimization stage 1 on syn_signal .......
Running optimization stage 1 on delay_1s_1s_1 .......
Running optimization stage 1 on syn_signal_0 .......
Running optimization stage 1 on delay_8s_1s .......
Running optimization stage 1 on delay_3s_1s .......
Running optimization stage 1 on delay_4s_1s .......
Running optimization stage 1 on data_round_36s_18s_2s_17s_21s_16s .......
Running optimization stage 1 on iir_direct_form_ii .......
Running optimization stage 1 on IIR .......
@N:CG364 : iir_filter.v(27029) | Synthesizing module IIR_Filter_Top in library work.
Running optimization stage 1 on IIR_Filter_Top .......
@N:CG364 : exp_iir.v(2) | Synthesizing module exp_iir in library work.
Opening data file data_in.dat from directory E:\myWork\IP\releaseVerify\V1.9.7.01\Gowin_IIR_Filter_RefDesign\Ref_Design\src
@W:CG532 : exp_iir.v(62) | Within an initial block, only Verilog force statements and memory $readmemh/$readmemb initialization statements are recognized, and all other content is ignored.
@N:CG179 : exp_iir.v(73) | Removing redundant assignment.
@W:CS263 : exp_iir.v(113) | Port-width mismatch for port coeff_a. The port definition is 32 bits, but the actual port connection bit width is 18. Adjust either the definition or the instantiation of this port.
@W:CS263 : exp_iir.v(114) | Port-width mismatch for port coeff_b. The port definition is 32 bits, but the actual port connection bit width is 18. Adjust either the definition or the instantiation of this port.
Running optimization stage 1 on exp_iir .......
Running optimization stage 2 on exp_iir .......
Running optimization stage 2 on IIR_Filter_Top .......
@W:CL246 : iir_filter.v(27063) | Input port bits 31 to 18 of coeff_a[31:0] are unused. Assign logic for all port bits or change the input port size.
@W:CL246 : iir_filter.v(27064) | Input port bits 31 to 18 of coeff_b[31:0] are unused. Assign logic for all port bits or change the input port size.
@N:CL159 : iir_filter.v(27062) | Input coeff_set is unused.
Running optimization stage 2 on IIR .......
Running optimization stage 2 on iir_direct_form_ii .......
Running optimization stage 2 on data_round_36s_18s_2s_17s_21s_16s .......
Running optimization stage 2 on delay_4s_1s .......
Running optimization stage 2 on delay_3s_1s .......
Running optimization stage 2 on delay_8s_1s .......
Running optimization stage 2 on syn_signal_0 .......
Running optimization stage 2 on delay_1s_1s_1 .......
Running optimization stage 2 on syn_signal .......
Running optimization stage 2 on delay_1s_36s_0 .......
Running optimization stage 2 on dsp_Multiplier_18s_18s_36s_3_0 .......
Running optimization stage 2 on dsp_Multiplier_18s_18s_36s_0 .......
Running optimization stage 2 on delay_3s_3s_0 .......
Running optimization stage 2 on delay_1s_3s_0 .......
Running optimization stage 2 on delay_3s_18s_1 .......
Running optimization stage 2 on delay_1s_18s_0 .......
Running optimization stage 2 on delay_1s_36s .......
Running optimization stage 2 on dsp_Multiplier_18s_18s_36s_3 .......
Running optimization stage 2 on dsp_Multiplier_18s_18s_36s .......
Running optimization stage 2 on MULT18X18 .......
Running optimization stage 2 on delay_1s_3s .......
Running optimization stage 2 on delay_3s_3s .......
Running optimization stage 2 on delay_3s_18s_0 .......
Running optimization stage 2 on delay_1s_18s .......
Running optimization stage 2 on shift_reg_6s_18s_3_0 .......
Running optimization stage 2 on shift_reg_6s_18s_0 .......
Running optimization stage 2 on shift_reg_6s_18s_3 .......
Running optimization stage 2 on shift_reg_6s_18s .......
Running optimization stage 2 on delay_1s_4s .......
Running optimization stage 2 on delay_2s_1s_0 .......
Running optimization stage 2 on delay_2s_1s .......
Running optimization stage 2 on \singlerate_coeff_rom_coeff_b_in.dat_12s_18s .......
Running optimization stage 2 on \singlerate_coeff_rom_coeff_a_in.dat_12s_18s .......
Running optimization stage 2 on SPX9 .......
Running optimization stage 2 on DFFS .......
Running optimization stage 2 on DFFR .......
Running optimization stage 2 on delay_4s_18s_0 .......
Running optimization stage 2 on delay_4s_18s .......
Running optimization stage 2 on delay_1s_1s .......
Running optimization stage 2 on delay_3s_18s .......
Running optimization stage 2 on VCC .......
Running optimization stage 2 on GND .......
Running optimization stage 2 on RAM16S4 .......
Running optimization stage 2 on DFFE .......
Running optimization stage 2 on INV .......
Running optimization stage 2 on ALU .......
Running optimization stage 2 on RAM16SDP4 .......
Running optimization stage 2 on DFFC .......
Running optimization stage 2 on DFFPE .......
Running optimization stage 2 on DFFP .......
Running optimization stage 2 on DFFCE .......
Running optimization stage 2 on LUT2 .......
Running optimization stage 2 on LUT3 .......
Running optimization stage 2 on LUT4 .......
Running optimization stage 2 on MUX2_LUT6 .......
Running optimization stage 2 on MUX2_LUT5 .......
Running optimization stage 2 on GSR .......
For a summary of runtime and memory usage per design unit, please see file:
==========================================================
Linked File: layer0.rt.csv
At c_ver Exit (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 115MB peak: 115MB)
Process took 0h:00m:03s realtime, 0h:00m:03s cputime
Process completed successfully.
# Fri Nov 20 15:47:51 2020
###########################################################]
###########################################################[
Copyright (C) 1994-2020 Synopsys, Inc.
This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
and may only be used pursuant to the terms and conditions of a written license agreement
with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
Synopsys software or the associated documentation is strictly prohibited.
Tool: Synplify Pro (R)
Build: Q-2020.03G-Beta1
Install: C:\Gowin\Gowin_V1.9.7.01Beta\SynplifyPro
OS: Windows 6.1
Hostname: GW-SW-031
Implementation : rev_1
Synopsys Synopsys Netlist Linker, Version comp202003syn, Build 137R, Built May 11 2020 09:06:37, @
@N: : | Running in 64-bit mode
@N:NF107 : exp_iir.v(2) | Selected library: work cell: exp_iir view verilog as top level
@N:NF107 : exp_iir.v(2) | Selected library: work cell: exp_iir view verilog as top level
At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 97MB peak: 97MB)
Process took 0h:00m:01s realtime, 0h:00m:01s cputime
Process completed successfully.
# Fri Nov 20 15:47:51 2020
###########################################################]
For a summary of runtime and memory usage for all design units, please see file:
==========================================================
Linked File: Ref_Design_comp.rt.csv
@END
At c_hdl Exit (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 22MB peak: 22MB)
Process took 0h:00m:04s realtime, 0h:00m:04s cputime
Process completed successfully.
# Fri Nov 20 15:47:51 2020
###########################################################]