Synthesis Messages

Report Title GowinSynthesis Report
Design File C:\Gowin\Gowin_V1.9.11_x64\IDE\ipcore\FP_Exponential\data\FP_Exponential_wrap.v
C:\Gowin\Gowin_V1.9.11_x64\IDE\ipcore\FP_Exponential\data\FP_Exponential.v
GowinSynthesis Constraints File ---
Tool Version V1.9.11 (64-bit)
Part Number GW5A-LV25UG324ES
Device GW5A-25
Device Version A
Created Time Tue Dec 24 17:12:59 2024
Legal Announcement Copyright (C)2014-2024 Gowin Semiconductor Corporation. ALL rights reserved.

Synthesis Details

Top Level Module FP_Exponential_Top
Synthesis Process Running parser:
    CPU time = 0h 0m 0.406s, Elapsed time = 0h 0m 0.466s, Peak memory usage = 132.145MB
Running netlist conversion:
    CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.028s, Peak memory usage = 132.145MB
Running device independent optimization:
    Optimizing Phase 0: CPU time = 0h 0m 0.203s, Elapsed time = 0h 0m 0.206s, Peak memory usage = 132.145MB
    Optimizing Phase 1: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.058s, Peak memory usage = 132.145MB
    Optimizing Phase 2: CPU time = 0h 0m 0.203s, Elapsed time = 0h 0m 0.207s, Peak memory usage = 132.145MB
Running inference:
    Inferring Phase 0: CPU time = 0h 0m 0.046s, Elapsed time = 0h 0m 0.037s, Peak memory usage = 132.145MB
    Inferring Phase 1: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.073s, Peak memory usage = 132.145MB
    Inferring Phase 2: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.016s, Peak memory usage = 132.145MB
    Inferring Phase 3: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.058s, Peak memory usage = 132.145MB
Running technical mapping:
    Tech-Mapping Phase 0: CPU time = 0h 0m 0.14s, Elapsed time = 0h 0m 0.141s, Peak memory usage = 132.145MB
    Tech-Mapping Phase 1: CPU time = 0h 0m 0.046s, Elapsed time = 0h 0m 0.046s, Peak memory usage = 132.145MB
    Tech-Mapping Phase 2: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.025s, Peak memory usage = 132.145MB
    Tech-Mapping Phase 3: CPU time = 0h 0m 5s, Elapsed time = 0h 0m 5s, Peak memory usage = 153.563MB
    Tech-Mapping Phase 4: CPU time = 0h 0m 0.125s, Elapsed time = 0h 0m 0.174s, Peak memory usage = 153.563MB
Generate output files:
    CPU time = 0h 0m 0.265s, Elapsed time = 0h 0m 0.304s, Peak memory usage = 155.711MB
Total Time and Memory Usage CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 155.711MB

Resource

Resource Usage Summary

Resource Usage
I/O Port 71
I/O Buf 71
    IBUF 35
    OBUF 36
Register 1972
    DFFCE 1972
LUT 1149
    LUT2 141
    LUT3 406
    LUT4 602
ALU 1452
    ALU 1452
INV 27
    INV 27
DSP
    MULT27X36 6

Resource Utilization Summary

Resource Usage Utilization
Logic 2628(1176 LUT, 1452 ALU) / 23040 12%
Register 1972 / 23685 9%
  --Register as Latch 0 / 23685 0%
  --Register as FF 1972 / 23685 9%
BSRAM 0 / 56 0%

Timing

Clock Summary:

NO. Clock Name Type Period Frequency(MHz) Rise Fall Source Master Object
1 clk Base 10.000 100.0 0.000 5.000 clk_ibuf/I

Max Frequency Summary:

NO. Clock Name Constraint Actual Fmax Logic Level Entity
1 clk 100.000(MHz) 140.148(MHz) 6 TOP

Detail Timing Paths Information

Path 1

Path Summary:
Slack 2.865
Data Arrival Time 7.447
Data Required Time 10.311
From FP_Exponential_inst/frac_part_63_s3
To FP_Exponential_inst/data_z[0]_30_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.000 0.000 tINS RR 1974 clk_ibuf/O
0.375 0.375 tNET RR 37 FP_Exponential_inst/frac_part_63_s3/CLK[0]
4.005 3.630 tC2Q RR 1 FP_Exponential_inst/frac_part_63_s3/DOUT[42]
4.380 0.375 tNET RR 2 FP_Exponential_inst/frac_part_42_s/I0
4.937 0.556 tINS RF 1 FP_Exponential_inst/frac_part_42_s/COUT
4.937 0.000 tNET FF 2 FP_Exponential_inst/frac_part_43_s/CIN
4.987 0.050 tINS FR 1 FP_Exponential_inst/frac_part_43_s/COUT
4.987 0.000 tNET RR 2 FP_Exponential_inst/frac_part_44_s/CIN
5.037 0.050 tINS RR 1 FP_Exponential_inst/frac_part_44_s/COUT
5.037 0.000 tNET RR 2 FP_Exponential_inst/frac_part_45_s/CIN
5.087 0.050 tINS RR 1 FP_Exponential_inst/frac_part_45_s/COUT
5.087 0.000 tNET RR 2 FP_Exponential_inst/frac_part_46_s/CIN
5.137 0.050 tINS RR 1 FP_Exponential_inst/frac_part_46_s/COUT
5.137 0.000 tNET RR 2 FP_Exponential_inst/frac_part_47_s/CIN
5.187 0.050 tINS RR 1 FP_Exponential_inst/frac_part_47_s/COUT
5.187 0.000 tNET RR 2 FP_Exponential_inst/frac_part_48_s/CIN
5.237 0.050 tINS RR 1 FP_Exponential_inst/frac_part_48_s/COUT
5.237 0.000 tNET RR 2 FP_Exponential_inst/frac_part_49_s/CIN
5.287 0.050 tINS RR 1 FP_Exponential_inst/frac_part_49_s/COUT
5.287 0.000 tNET RR 2 FP_Exponential_inst/frac_part_50_s/CIN
5.337 0.050 tINS RR 1 FP_Exponential_inst/frac_part_50_s/COUT
5.337 0.000 tNET RR 2 FP_Exponential_inst/frac_part_51_s/CIN
5.387 0.050 tINS RR 1 FP_Exponential_inst/frac_part_51_s/COUT
5.387 0.000 tNET RR 2 FP_Exponential_inst/frac_part_52_s/CIN
5.437 0.050 tINS RR 1 FP_Exponential_inst/frac_part_52_s/COUT
5.437 0.000 tNET RR 2 FP_Exponential_inst/frac_part_53_s/CIN
5.487 0.050 tINS RR 1 FP_Exponential_inst/frac_part_53_s/COUT
5.487 0.000 tNET RR 2 FP_Exponential_inst/frac_part_54_s/CIN
5.537 0.050 tINS RR 1 FP_Exponential_inst/frac_part_54_s/COUT
5.537 0.000 tNET RR 2 FP_Exponential_inst/frac_part_55_s/CIN
5.587 0.050 tINS RR 1 FP_Exponential_inst/frac_part_55_s/COUT
5.587 0.000 tNET RR 2 FP_Exponential_inst/frac_part_56_s/CIN
5.637 0.050 tINS RR 1 FP_Exponential_inst/frac_part_56_s/COUT
5.637 0.000 tNET RR 2 FP_Exponential_inst/frac_part_57_s/CIN
5.687 0.050 tINS RR 1 FP_Exponential_inst/frac_part_57_s/COUT
5.687 0.000 tNET RR 2 FP_Exponential_inst/frac_part_58_s/CIN
5.737 0.050 tINS RR 1 FP_Exponential_inst/frac_part_58_s/COUT
5.737 0.000 tNET RR 2 FP_Exponential_inst/frac_part_59_s/CIN
5.787 0.050 tINS RR 1 FP_Exponential_inst/frac_part_59_s/COUT
5.787 0.000 tNET RR 2 FP_Exponential_inst/frac_part_60_s/CIN
5.837 0.050 tINS RR 1 FP_Exponential_inst/frac_part_60_s/COUT
5.837 0.000 tNET RR 2 FP_Exponential_inst/frac_part_61_s/CIN
5.887 0.050 tINS RR 1 FP_Exponential_inst/frac_part_61_s/COUT
5.887 0.000 tNET RR 2 FP_Exponential_inst/frac_part_62_s/CIN
5.937 0.050 tINS RR 1 FP_Exponential_inst/frac_part_62_s/COUT
5.937 0.000 tNET RR 2 FP_Exponential_inst/frac_part_63_s5/CIN
6.180 0.244 tINS RR 1 FP_Exponential_inst/frac_part_63_s5/SUM
6.555 0.375 tNET RR 1 FP_Exponential_inst/n668_s2/I1
7.072 0.516 tINS RR 1 FP_Exponential_inst/n668_s2/F
7.447 0.375 tNET RR 1 FP_Exponential_inst/data_z[0]_30_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.000 0.000 tINS RR 1974 clk_ibuf/O
10.375 0.375 tNET RR 1 FP_Exponential_inst/data_z[0]_30_s0/CLK
10.311 -0.064 tSu 1 FP_Exponential_inst/data_z[0]_30_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 6
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%
Arrival Data Path Delay: cell: 2.316, 32.754%; route: 1.125, 15.909%; tC2Q: 3.630, 51.337%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%

Path 2

Path Summary:
Slack 2.915
Data Arrival Time 7.397
Data Required Time 10.311
From FP_Exponential_inst/frac_part_63_s3
To FP_Exponential_inst/data_z[0]_29_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.000 0.000 tINS RR 1974 clk_ibuf/O
0.375 0.375 tNET RR 37 FP_Exponential_inst/frac_part_63_s3/CLK[0]
4.005 3.630 tC2Q RR 1 FP_Exponential_inst/frac_part_63_s3/DOUT[42]
4.380 0.375 tNET RR 2 FP_Exponential_inst/frac_part_42_s/I0
4.937 0.556 tINS RF 1 FP_Exponential_inst/frac_part_42_s/COUT
4.937 0.000 tNET FF 2 FP_Exponential_inst/frac_part_43_s/CIN
4.987 0.050 tINS FR 1 FP_Exponential_inst/frac_part_43_s/COUT
4.987 0.000 tNET RR 2 FP_Exponential_inst/frac_part_44_s/CIN
5.037 0.050 tINS RR 1 FP_Exponential_inst/frac_part_44_s/COUT
5.037 0.000 tNET RR 2 FP_Exponential_inst/frac_part_45_s/CIN
5.087 0.050 tINS RR 1 FP_Exponential_inst/frac_part_45_s/COUT
5.087 0.000 tNET RR 2 FP_Exponential_inst/frac_part_46_s/CIN
5.137 0.050 tINS RR 1 FP_Exponential_inst/frac_part_46_s/COUT
5.137 0.000 tNET RR 2 FP_Exponential_inst/frac_part_47_s/CIN
5.187 0.050 tINS RR 1 FP_Exponential_inst/frac_part_47_s/COUT
5.187 0.000 tNET RR 2 FP_Exponential_inst/frac_part_48_s/CIN
5.237 0.050 tINS RR 1 FP_Exponential_inst/frac_part_48_s/COUT
5.237 0.000 tNET RR 2 FP_Exponential_inst/frac_part_49_s/CIN
5.287 0.050 tINS RR 1 FP_Exponential_inst/frac_part_49_s/COUT
5.287 0.000 tNET RR 2 FP_Exponential_inst/frac_part_50_s/CIN
5.337 0.050 tINS RR 1 FP_Exponential_inst/frac_part_50_s/COUT
5.337 0.000 tNET RR 2 FP_Exponential_inst/frac_part_51_s/CIN
5.387 0.050 tINS RR 1 FP_Exponential_inst/frac_part_51_s/COUT
5.387 0.000 tNET RR 2 FP_Exponential_inst/frac_part_52_s/CIN
5.437 0.050 tINS RR 1 FP_Exponential_inst/frac_part_52_s/COUT
5.437 0.000 tNET RR 2 FP_Exponential_inst/frac_part_53_s/CIN
5.487 0.050 tINS RR 1 FP_Exponential_inst/frac_part_53_s/COUT
5.487 0.000 tNET RR 2 FP_Exponential_inst/frac_part_54_s/CIN
5.537 0.050 tINS RR 1 FP_Exponential_inst/frac_part_54_s/COUT
5.537 0.000 tNET RR 2 FP_Exponential_inst/frac_part_55_s/CIN
5.587 0.050 tINS RR 1 FP_Exponential_inst/frac_part_55_s/COUT
5.587 0.000 tNET RR 2 FP_Exponential_inst/frac_part_56_s/CIN
5.637 0.050 tINS RR 1 FP_Exponential_inst/frac_part_56_s/COUT
5.637 0.000 tNET RR 2 FP_Exponential_inst/frac_part_57_s/CIN
5.687 0.050 tINS RR 1 FP_Exponential_inst/frac_part_57_s/COUT
5.687 0.000 tNET RR 2 FP_Exponential_inst/frac_part_58_s/CIN
5.737 0.050 tINS RR 1 FP_Exponential_inst/frac_part_58_s/COUT
5.737 0.000 tNET RR 2 FP_Exponential_inst/frac_part_59_s/CIN
5.787 0.050 tINS RR 1 FP_Exponential_inst/frac_part_59_s/COUT
5.787 0.000 tNET RR 2 FP_Exponential_inst/frac_part_60_s/CIN
5.837 0.050 tINS RR 1 FP_Exponential_inst/frac_part_60_s/COUT
5.837 0.000 tNET RR 2 FP_Exponential_inst/frac_part_61_s/CIN
5.887 0.050 tINS RR 1 FP_Exponential_inst/frac_part_61_s/COUT
5.887 0.000 tNET RR 2 FP_Exponential_inst/frac_part_62_s/CIN
6.130 0.244 tINS RR 1 FP_Exponential_inst/frac_part_62_s/SUM
6.505 0.375 tNET RR 1 FP_Exponential_inst/n669_s2/I1
7.022 0.516 tINS RR 1 FP_Exponential_inst/n669_s2/F
7.397 0.375 tNET RR 1 FP_Exponential_inst/data_z[0]_29_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.000 0.000 tINS RR 1974 clk_ibuf/O
10.375 0.375 tNET RR 1 FP_Exponential_inst/data_z[0]_29_s0/CLK
10.311 -0.064 tSu 1 FP_Exponential_inst/data_z[0]_29_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 6
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%
Arrival Data Path Delay: cell: 2.266, 32.276%; route: 1.125, 16.022%; tC2Q: 3.630, 51.702%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%

Path 3

Path Summary:
Slack 2.935
Data Arrival Time 7.376
Data Required Time 10.311
From FP_Exponential_inst/data_w[27]_8_s0
To FP_Exponential_inst/temp_mantissa_8_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.000 0.000 tINS RR 1974 clk_ibuf/O
0.375 0.375 tNET RR 1 FP_Exponential_inst/data_w[27]_8_s0/CLK
0.757 0.382 tC2Q RR 8 FP_Exponential_inst/data_w[27]_8_s0/Q
1.132 0.375 tNET RR 1 FP_Exponential_inst/n41_s12/I0
1.659 0.526 tINS RR 1 FP_Exponential_inst/n41_s12/F
2.034 0.375 tNET RR 1 FP_Exponential_inst/n41_s8/I0
2.560 0.526 tINS RR 1 FP_Exponential_inst/n41_s8/F
2.935 0.375 tNET RR 1 FP_Exponential_inst/n17299_s7/I0
3.461 0.526 tINS RR 1 FP_Exponential_inst/n17299_s7/F
3.836 0.375 tNET RR 1 FP_Exponential_inst/n17299_s5/I0
4.362 0.526 tINS RR 1 FP_Exponential_inst/n17299_s5/F
4.737 0.375 tNET RR 1 FP_Exponential_inst/n17299_s3/I0
5.264 0.526 tINS RR 1 FP_Exponential_inst/n17299_s3/F
5.639 0.375 tNET RR 1 FP_Exponential_inst/n17299_s1/I0
6.165 0.526 tINS RR 1 FP_Exponential_inst/n17299_s1/F
6.540 0.375 tNET RR 1 FP_Exponential_inst/n17299_s0/I2
7.001 0.461 tINS RR 1 FP_Exponential_inst/n17299_s0/F
7.376 0.375 tNET RR 1 FP_Exponential_inst/temp_mantissa_8_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.000 0.000 tINS RR 1974 clk_ibuf/O
10.375 0.375 tNET RR 1 FP_Exponential_inst/temp_mantissa_8_s0/CLK
10.311 -0.064 tSu 1 FP_Exponential_inst/temp_mantissa_8_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 8
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%
Arrival Data Path Delay: cell: 3.619, 51.688%; route: 3.000, 42.849%; tC2Q: 0.382, 5.463%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%

Path 4

Path Summary:
Slack 2.935
Data Arrival Time 7.376
Data Required Time 10.311
From FP_Exponential_inst/data_w[27]_13_s0
To FP_Exponential_inst/temp_mantissa_13_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.000 0.000 tINS RR 1974 clk_ibuf/O
0.375 0.375 tNET RR 1 FP_Exponential_inst/data_w[27]_13_s0/CLK
0.757 0.382 tC2Q RR 8 FP_Exponential_inst/data_w[27]_13_s0/Q
1.132 0.375 tNET RR 1 FP_Exponential_inst/n46_s9/I0
1.659 0.526 tINS RR 2 FP_Exponential_inst/n46_s9/F
2.034 0.375 tNET RR 1 FP_Exponential_inst/n46_s7/I0
2.560 0.526 tINS RR 2 FP_Exponential_inst/n46_s7/F
2.935 0.375 tNET RR 1 FP_Exponential_inst/n17294_s7/I0
3.461 0.526 tINS RR 1 FP_Exponential_inst/n17294_s7/F
3.836 0.375 tNET RR 1 FP_Exponential_inst/n17294_s5/I0
4.362 0.526 tINS RR 1 FP_Exponential_inst/n17294_s5/F
4.737 0.375 tNET RR 1 FP_Exponential_inst/n17294_s3/I0
5.264 0.526 tINS RR 1 FP_Exponential_inst/n17294_s3/F
5.639 0.375 tNET RR 1 FP_Exponential_inst/n17294_s1/I0
6.165 0.526 tINS RR 1 FP_Exponential_inst/n17294_s1/F
6.540 0.375 tNET RR 1 FP_Exponential_inst/n17294_s0/I2
7.001 0.461 tINS RR 1 FP_Exponential_inst/n17294_s0/F
7.376 0.375 tNET RR 1 FP_Exponential_inst/temp_mantissa_13_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.000 0.000 tINS RR 1974 clk_ibuf/O
10.375 0.375 tNET RR 1 FP_Exponential_inst/temp_mantissa_13_s0/CLK
10.311 -0.064 tSu 1 FP_Exponential_inst/temp_mantissa_13_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 8
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%
Arrival Data Path Delay: cell: 3.619, 51.688%; route: 3.000, 42.849%; tC2Q: 0.382, 5.463%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%

Path 5

Path Summary:
Slack 2.935
Data Arrival Time 7.376
Data Required Time 10.311
From FP_Exponential_inst/data_w[27]_14_s0
To FP_Exponential_inst/temp_mantissa_14_s0
Launch Clk clk[R]
Latch Clk clk[R]
Data Arrival Path:
AT DELAY TYPE RF FANOUT NODE
0.000 0.000 clk
0.000 0.000 tCL RR 1 clk_ibuf/I
0.000 0.000 tINS RR 1974 clk_ibuf/O
0.375 0.375 tNET RR 1 FP_Exponential_inst/data_w[27]_14_s0/CLK
0.757 0.382 tC2Q RR 8 FP_Exponential_inst/data_w[27]_14_s0/Q
1.132 0.375 tNET RR 1 FP_Exponential_inst/n47_s15/I0
1.659 0.526 tINS RR 2 FP_Exponential_inst/n47_s15/F
2.034 0.375 tNET RR 1 FP_Exponential_inst/n47_s13/I0
2.560 0.526 tINS RR 2 FP_Exponential_inst/n47_s13/F
2.935 0.375 tNET RR 1 FP_Exponential_inst/n17293_s7/I0
3.461 0.526 tINS RR 1 FP_Exponential_inst/n17293_s7/F
3.836 0.375 tNET RR 1 FP_Exponential_inst/n17293_s5/I0
4.362 0.526 tINS RR 1 FP_Exponential_inst/n17293_s5/F
4.737 0.375 tNET RR 1 FP_Exponential_inst/n17293_s3/I0
5.264 0.526 tINS RR 1 FP_Exponential_inst/n17293_s3/F
5.639 0.375 tNET RR 1 FP_Exponential_inst/n17293_s1/I0
6.165 0.526 tINS RR 1 FP_Exponential_inst/n17293_s1/F
6.540 0.375 tNET RR 1 FP_Exponential_inst/n17293_s0/I2
7.001 0.461 tINS RR 1 FP_Exponential_inst/n17293_s0/F
7.376 0.375 tNET RR 1 FP_Exponential_inst/temp_mantissa_14_s0/D
Data Required Path:
AT DELAY TYPE RF FANOUT NODE
10.000 0.000 clk
10.000 0.000 tCL RR 1 clk_ibuf/I
10.000 0.000 tINS RR 1974 clk_ibuf/O
10.375 0.375 tNET RR 1 FP_Exponential_inst/temp_mantissa_14_s0/CLK
10.311 -0.064 tSu 1 FP_Exponential_inst/temp_mantissa_14_s0
Path Statistics:
Clock Skew: 0.000
Setup Relationship: 10.000
Logic Level: 8
Arrival Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%
Arrival Data Path Delay: cell: 3.619, 51.688%; route: 3.000, 42.849%; tC2Q: 0.382, 5.463%
Required Clock Path Delay: cell: 0.000, 0.000%; route: 0.375, 100.000%