@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode
@N: CG1350 :	| Running Verilog Compiler in Multiple File Compilation Unit mode
@N: CG346 :"D:\GOWIN_refdesign\apsram256M_ref\project\fpga_project\src\apsram_core.v":160:34:160:42|Read full_case directive.
@N: CG347 :"D:\GOWIN_refdesign\apsram256M_ref\project\fpga_project\src\apsram_core.v":160:44:160:56|Read a parallel_case directive.
@N: CG364 :"D:\GOWIN_refdesign\apsram256M_ref\project\fpga_project\src\PSRAM_TOP.v":5:26:5:26|Synthesizing module psram_memory_interface_top in library work.
@N|Running in 64-bit mode
@N: NF107 :"d:\gowin_refdesign\apsram256m_ref\project\fpga_project\src\psram_top.v":5:26:5:26|Selected library: work cell: psram_memory_interface_top view verilog as top level
@N: NF107 :"d:\gowin_refdesign\apsram256m_ref\project\fpga_project\src\psram_top.v":5:26:5:26|Selected library: work cell: psram_memory_interface_top view verilog as top level

