Hierarchy Module Resource
| MODULE NAME | REG NUMBER | ALU NUMBER | LUT NUMBER | DSP NUMBER | BSRAM NUMBER | SSRAM NUMBER |
|---|---|---|---|---|---|---|
| syn_top (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_1ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) | - | - | - | - | - | - | |--your_instance_name (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_1ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) | - | - | - | - | - | - | |--u_psram_memory_interface_top (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_1ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) | 1005 | 64 | 1726 | - | - | 36 | |--u_test (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_solo_1ch_Refdesign/project/fpga_project/src/apsram_syn_top.v) | 477 | 91 | 638 | - | - | - |