Hierarchy Module Resource

MODULE NAME REG NUMBER ALU NUMBER LUT NUMBER DSP NUMBER BSRAM NUMBER SSRAM NUMBER
syn_top (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_256_solo_Refdesign/project/fpga_project/src/top.v) 1 - 1 - - -
    |--button (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_256_solo_Refdesign/project/fpga_project/src/top.v) 24 19 9 - - -
    |--your_instance_name (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_256_solo_Refdesign/project/fpga_project/src/top.v) - - - - - -
    |--psram_memory_interface_top (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_256_solo_Refdesign/project/fpga_project/src/top.v) 420 42 697 - 1 -
    |--u_test (E:/myWork/IP/releaseVerify/V1.9.7.02/zipFile/apsram_reference_design/apsram_256_solo_Refdesign/project/fpga_project/src/top.v) 293 68 451 - - -