Pin Messages

Report Title Pin Report
Design File E:\IP\PSRAM\UHS_PSRAM_Memory_Interface\RefDesign\Gowin_UHS_PSRAM_Memory_Interface_RefDesign\uhs_psram_memory_interface_2_channel\project\fpga_project\impl\gwsynthesis\fpga_project.vg
Physical Constraints File E:\IP\PSRAM\UHS_PSRAM_Memory_Interface\RefDesign\Gowin_UHS_PSRAM_Memory_Interface_RefDesign\uhs_psram_memory_interface_2_channel\project\fpga_project\src\a.cst
Timing Constraints File E:\IP\PSRAM\UHS_PSRAM_Memory_Interface\RefDesign\Gowin_UHS_PSRAM_Memory_Interface_RefDesign\uhs_psram_memory_interface_2_channel\project\fpga_project\src\fpga_project.sdc
Tool Version V1.9.11.02 (64-bit)
Part Number GW1NR-LV9MG100PAC7/I6
Device GW1NR-9
Device Version C
Created Time Wed May 28 13:47:58 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

Pin Details

Pinout by Port Name:

Port Name Diff Pair Loc./Bank Constraint Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor BankVccio
clk - E6/0 Y in IOT29[A] GCLKT_1 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
rst_n - K1/2 Y in IOB4[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
O_apsram_ck[0] O_apsram_ck_n[0] p1-7,p1-8/3 - out IOL7 - LVCMOS18D - NA - - - - - - -
O_apsram_ck[1] O_apsram_ck_n[1] p2-7,p2-8/3 - out IOL23 - LVCMOS18D - NA - - - - - - -
O_apsram_ck[2] O_apsram_ck_n[2] p3-7,p3-8/1 - out IOR8 - LVCMOS18D - NA - - - - - - -
O_apsram_ck[3] O_apsram_ck_n[3] p4-7,p4-8/1 - out IOR22 - LVCMOS18D - NA - - - - - - -
O_apsram_dm[0] - p1-14/3 - out IOL2[A] - LVCMOS18 - UP - - - - - - -
O_apsram_dm[1] - p2-14/3 - out IOL16[B] - LVCMOS18 - UP - - - - - - -
O_apsram_dm[2] - p3-14/1 - out IOR15[A] DIN/CLKHOLD_N LVCMOS18 - UP - - - - - - -
O_apsram_dm[3] - p4-14/1 - out IOR27[B] - LVCMOS18 - UP - - - - - - -
O_apsram_cs_n[0] - p1-9/3 - out IOL6[B] LPLL_C_fb LVCMOS18 - UP - - - - - - -
O_apsram_cs_n[1] - p2-9/3 - out IOL22[A] - LVCMOS18 - UP - - - - - - -
O_apsram_cs_n[2] - p3-9/1 - out IOR11[A] MI/D7 LVCMOS18 - UP - - - - - - -
O_apsram_cs_n[3] - p4-9/1 - out IOR24[A] - LVCMOS18 - UP - - - - - - -
init_calib - A6/0 Y out IOT28[A] GCLKT_0 LVCMOS18 8 UP NA NA OFF NA NA NA 1.8
error - B6/0 Y out IOT21[B] - LVCMOS18 8 UP NA NA OFF NA NA NA 1.8
IO_apsram_dqs[0] - p1-2/3 - io IOL16[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dqs[1] - p2-2/3 - io IOL27[B] - LVCMOS18 - UP - - - - - - -
IO_apsram_dqs[2] - p3-2/1 - io IOR2[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dqs[3] - p4-2/1 - io IOR16[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[0] - p1-13/3 - io IOL2[B] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[1] - p1-12/3 - io IOL3[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[2] - p1-11/3 - io IOL4[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[3] - p1-10/3 - io IOL6[A] LPLL_T_fb LVCMOS18 - UP - - - - - - -
IO_apsram_dq[4] - p1-6/3 - io IOL8[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[5] - p1-5/3 - io IOL12[A] SCLK LVCMOS18 - UP - - - - - - -
IO_apsram_dq[6] - p1-4/3 - io IOL14[A] DONE LVCMOS18 - UP - - - - - - -
IO_apsram_dq[7] - p1-3/3 - io IOL15[A] GCLKT_6 LVCMOS18 - UP - - - - - - -
IO_apsram_dq[8] - p2-13/3 - io IOL17[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[9] - p2-12/3 - io IOL20[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[10] - p2-11/3 - io IOL20[B] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[11] - p2-10/3 - io IOL21[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[12] - p2-6/3 - io IOL25[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[13] - p2-5/3 - io IOL26[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[14] - p2-4/3 - io IOL26[B] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[15] - p2-3/3 - io IOL27[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[16] - p3-13/1 - io IOR14[A] SO/D1 LVCMOS18 - UP - - - - - - -
IO_apsram_dq[17] - p3-12/1 - io IOR13[B] SI/D2 LVCMOS18 - UP - - - - - - -
IO_apsram_dq[18] - p3-11/1 - io IOR13[A] FASTRD_N/D3 LVCMOS18 - UP - - - - - - -
IO_apsram_dq[19] - p3-10/1 - io IOR12[A] MCS_N/D5 LVCMOS18 - UP - - - - - - -
IO_apsram_dq[20] - p3-6/1 - io IOR6[B] RPLL_C_fb LVCMOS18 - UP - - - - - - -
IO_apsram_dq[21] - p3-5/1 - io IOR6[A] RPLL_T_fb LVCMOS18 - UP - - - - - - -
IO_apsram_dq[22] - p3-4/1 - io IOR4[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[23] - p3-3/1 - io IOR3[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[24] - p4-13/1 - io IOR27[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[25] - p4-12/1 - io IOR26[B] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[26] - p4-11/1 - io IOR26[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[27] - p4-10/1 - io IOR25[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[28] - p4-6/1 - io IOR21[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[29] - p4-5/1 - io IOR20[B] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[30] - p4-4/1 - io IOR20[A] - LVCMOS18 - UP - - - - - - -
IO_apsram_dq[31] - p4-3/1 - io IOR18[A] - LVCMOS18 - UP - - - - - - -

All Package Pins:

Loc./Bank Signal Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor Bank Vccio
D4/3 - in IOT6[B] MODE1 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
A3/3 - in IOT8[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
A4/3 - in IOT8[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
C4/3 - in IOT11[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B4/3 - in IOT11[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
D5/0 - in IOT13[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
D6/0 - in IOT13[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
C5/0 - in IOT17[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B5/0 - in IOT17[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
C6/0 - in IOT21[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B6/0 error out IOT21[B] - LVCMOS18 8 UP NA NA OFF NA NA NA 1.8
A6/0 init_calib out IOT28[A] GCLKT_0 LVCMOS18 8 UP NA NA OFF NA NA NA 1.8
A7/0 - in IOT28[B] GCLKC_0 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
E6/0 clk in IOT29[A] GCLKT_1 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
E7/0 - in IOT29[B] GCLKC_1 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
C7/0 - in IOT33[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B7/0 - in IOT33[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B8/1 - in IOT39[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
C8/1 - in IOT39[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
D7/1 - in IOT41[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
D8/1 - in IOT41[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B9/1 - in IOT45[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
A10/1 - in IOT45[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
H1/2 - in IOB3[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K1/2 rst_n in IOB4[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K2/2 - in IOB4[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
G4/2 - in IOB8[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
G3/2 - in IOB8[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
J3/2 - in IOB11[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
H3/2 - in IOB11[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
E4/2 - in IOB13[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
F4/2 - in IOB13[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K3/2 - in IOB15[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K4/2 - in IOB15[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
J4/2 - in IOB17[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
H4/2 - in IOB17[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K5/2 - in IOB21[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K6/2 - in IOB21[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
H5/2 - in IOB23[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
G5/2 - in IOB23[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
F5/2 - in IOB28[A] GCLKT_5 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
E5/2 - in IOB28[B] GCLKC_5 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
J6/2 - in IOB29[A] GCLKT_4 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
H6/2 - in IOB29[B] GCLKC_4 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K7/2 - in IOB31[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K8/2 - in IOB31[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
J7/2 - in IOB33[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
H7/2 - in IOB33[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
F6/2 - in IOB35[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
G6/2 - in IOB35[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
F7/2 - in IOB39[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
G7/2 - in IOB39[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K10/2 - in IOB41[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
K9/2 - in IOB41[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
J10/2 - in IOB43[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p1-14/3 O_apsram_dm[0] out IOL2[A] - LVCMOS18 - UP - - - - - - -
p1-13/3 IO_apsram_dq[0] io IOL2[B] - LVCMOS18 - UP - - - - - - -
p1-12/3 IO_apsram_dq[1] io IOL3[A] - LVCMOS18 - UP - - - - - - -
p1-11/3 IO_apsram_dq[2] io IOL4[A] - LVCMOS18 - UP - - - - - - -
B2/3 - in IOL4[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B1/3 - in IOL5[A] JTAGSEL_N/LPLL_T_in LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
B3/3 - in IOL5[B] LPLL_C_in LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p1-10/3 IO_apsram_dq[3] io IOL6[A] LPLL_T_fb LVCMOS18 - UP - - - - - - -
p1-9/3 O_apsram_cs_n[0] out IOL6[B] LPLL_C_fb LVCMOS18 - UP - - - - - - -
p1-7/3 O_apsram_ck[0] out IOL7[A] - LVCMOS18D - NA - - - - - - -
p1-8/3 O_apsram_ck_n[0] out IOL7[B] - LVCMOS18D - NA - - - - - - -
p1-6/3 IO_apsram_dq[4] io IOL8[A] - LVCMOS18 - UP - - - - - - -
C1/3 - in IOL8[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
C2/3 - in IOL9[A] GCLKT_7 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
C3/3 - in IOL9[B] GCLKC_7 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
E2/3 - in IOL11[A] TMS LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
E3/3 - in IOL11[B] TCK LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p1-5/3 IO_apsram_dq[5] io IOL12[A] SCLK LVCMOS18 - UP - - - - - - -
F3/3 - in IOL12[B] TDI LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
F2/3 - out IOL13[A] TDO LVCMOS18 8 UP NA NA OFF NA NA NA 1.8
D3/3 - in IOL13[B] RECONFIG_N LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p1-4/3 IO_apsram_dq[6] io IOL14[A] DONE LVCMOS18 - UP - - - - - - -
D1/3 - in IOL14[B] READY LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p1-3/3 IO_apsram_dq[7] io IOL15[A] GCLKT_6 LVCMOS18 - UP - - - - - - -
p1-2/3 IO_apsram_dqs[0] io IOL16[A] - LVCMOS18 - UP - - - - - - -
p2-14/3 O_apsram_dm[1] out IOL16[B] - LVCMOS18 - UP - - - - - - -
p2-13/3 IO_apsram_dq[8] io IOL17[A] - LVCMOS18 - UP - - - - - - -
F1/3 - in IOL18[A] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
D2/3 - in IOL18[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p2-12/3 IO_apsram_dq[9] io IOL20[A] - LVCMOS18 - UP - - - - - - -
p2-11/3 IO_apsram_dq[10] io IOL20[B] - LVCMOS18 - UP - - - - - - -
p2-10/3 IO_apsram_dq[11] io IOL21[A] - LVCMOS18 - UP - - - - - - -
G2/3 - in IOL21[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p2-9/3 O_apsram_cs_n[1] out IOL22[A] - LVCMOS18 - UP - - - - - - -
G1/3 - in IOL22[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p2-7/3 O_apsram_ck[1] out IOL23[A] - LVCMOS18D - NA - - - - - - -
p2-8/3 O_apsram_ck_n[1] out IOL23[B] - LVCMOS18D - NA - - - - - - -
p2-6/3 IO_apsram_dq[12] io IOL25[A] - LVCMOS18 - UP - - - - - - -
H2/3 - in IOL25[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p2-5/3 IO_apsram_dq[13] io IOL26[A] - LVCMOS18 - UP - - - - - - -
p2-4/3 IO_apsram_dq[14] io IOL26[B] - LVCMOS18 - UP - - - - - - -
p2-3/3 IO_apsram_dq[15] io IOL27[A] - LVCMOS18 - UP - - - - - - -
p2-2/3 IO_apsram_dqs[1] io IOL27[B] - LVCMOS18 - UP - - - - - - -
p3-2/1 IO_apsram_dqs[2] io IOR2[A] - LVCMOS18 - UP - - - - - - -
C10/1 - in IOR2[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p3-3/1 IO_apsram_dq[23] io IOR3[A] - LVCMOS18 - UP - - - - - - -
B10/1 - in IOR3[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p3-4/1 IO_apsram_dq[22] io IOR4[A] - LVCMOS18 - UP - - - - - - -
C9/1 - in IOR5[A] RPLL_T_in LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
D9/1 - in IOR5[B] RPLL_C_in LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p3-5/1 IO_apsram_dq[21] io IOR6[A] RPLL_T_fb LVCMOS18 - UP - - - - - - -
p3-6/1 IO_apsram_dq[20] io IOR6[B] RPLL_C_fb LVCMOS18 - UP - - - - - - -
D10/1 - in IOR7[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p3-7/1 O_apsram_ck[2] out IOR8[A] - LVCMOS18D - NA - - - - - - -
p3-8/1 O_apsram_ck_n[2] out IOR8[B] - LVCMOS18D - NA - - - - - - -
E8/1 - in IOR9[A] GCLKT_2 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
F9/1 - in IOR9[B] GCLKC_2 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p3-9/1 O_apsram_cs_n[2] out IOR11[A] MI/D7 LVCMOS18 - UP - - - - - - -
p3-10/1 IO_apsram_dq[19] io IOR12[A] MCS_N/D5 LVCMOS18 - UP - - - - - - -
E10/1 - in IOR12[B] MCLK/D4 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p3-11/1 IO_apsram_dq[18] io IOR13[A] FASTRD_N/D3 LVCMOS18 - UP - - - - - - -
p3-12/1 IO_apsram_dq[17] io IOR13[B] SI/D2 LVCMOS18 - UP - - - - - - -
p3-13/1 IO_apsram_dq[16] io IOR14[A] SO/D1 LVCMOS18 - UP - - - - - - -
G9/1 - in IOR14[B] SSPI_CS_N/D0 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p3-14/1 O_apsram_dm[2] out IOR15[A] DIN/CLKHOLD_N LVCMOS18 - UP - - - - - - -
p4-2/1 IO_apsram_dqs[3] io IOR16[A] - LVCMOS18 - UP - - - - - - -
F10/1 - in IOR16[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
F8/1 - in IOR17[A] GCLKT_3 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
G8/1 - in IOR17[B] GCLKC_3 LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p4-3/1 IO_apsram_dq[31] io IOR18[A] - LVCMOS18 - UP - - - - - - -
H8/1 - in IOR18[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p4-4/1 IO_apsram_dq[30] io IOR20[A] - LVCMOS18 - UP - - - - - - -
p4-5/1 IO_apsram_dq[29] io IOR20[B] - LVCMOS18 - UP - - - - - - -
p4-6/1 IO_apsram_dq[28] io IOR21[A] - LVCMOS18 - UP - - - - - - -
G10/1 - in IOR21[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p4-7/1 O_apsram_ck[3] out IOR22[A] - LVCMOS18D - NA - - - - - - -
p4-8/1 O_apsram_ck_n[3] out IOR22[B] - LVCMOS18D - NA - - - - - - -
p4-9/1 O_apsram_cs_n[3] out IOR24[A] - LVCMOS18 - UP - - - - - - -
H9/1 - in IOR24[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p4-10/1 IO_apsram_dq[27] io IOR25[A] - LVCMOS18 - UP - - - - - - -
H10/1 - in IOR25[B] - LVCMOS18 NA UP ON NONE NA NA NA NA 1.8
p4-11/1 IO_apsram_dq[26] io IOR26[A] - LVCMOS18 - UP - - - - - - -
p4-12/1 IO_apsram_dq[25] io IOR26[B] - LVCMOS18 - UP - - - - - - -
p4-13/1 IO_apsram_dq[24] io IOR27[A] - LVCMOS18 - UP - - - - - - -
p4-14/1 O_apsram_dm[3] out IOR27[B] - LVCMOS18 - UP - - - - - - -