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	  Example APSRAM Design Read Me
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Object device:GWINR-LV9MG100PAC7/I6
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File List:
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.
|-- docs
|   `-- Readme.txt                      		-->  Read Me file (this file)
|-- tb 
|   `-- tb.v                             		 -->  TestBench for Example APSRAM design of modelsim
|   `-- prim_sim.v			-->  library file for simulation
|   |-- sim_model 
|        `-- APM.vp_modelsim               -->  Simulation model for modelsim
|        `-- APM.vp_vcs                         	-->  Simulation model for vcs
|-- project
|-- |--fpga_project
|         `-- fpga_project.gprj          		   -->  GowinYunYuan Project File for Example Design
|         `-- impl
|         |-- src                               	-->  File for GowinYunYuan Project in it
|              `-- apsram_syn_top.v                 -->  Top model file 
|              `-- apsram_test.v		-->  Test file
			   `-- key_debounce.v   --> button
|              `-- a.cst			-->  Physical Constraints file
|              `-- fpga_project.sdc                    -->  Timing Constraints file
|              |-- gowin_rpll			 -->  PLL
|              |-- uhs_psram_memory_interface	 -->  IP CORE
|-- simulation
|   |-- modelsim_sim
|        `--cmd.do			-->  simulation command file for Modelsim
|        `--complie.f			-->  simulation command file for Modelsim
|   |-- vcs_sim
|        `--makefile			-->  simulation command file for vcs+verdi
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HOW TO OPEN A PROJECT IN GowinYunYuan:
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1. Unzip the respective design files.
2. Launch GowinYunYuan and select "File -> Open -> Project"
3. In the Open Project dialog, enter the Project location -- "project/fpga_project",select the project"fpga_project.gprj".
4. Click Finish. Now the project is successfully loaded. 

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HOW TO RUN SYNTHESIZE, PLACE AND ROUTE, IP CORE GENERATION, AND TIMING ANALYSIS IN GowinYunYuan:
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1. Click the Process tab in the process panel of the GowinYunYuan dashboard. 
   Double click on Synthsize. This will bring the design through synthesis.
2. Click the Process tab in the process panel of the GowinYunYuan dashboard. 
   Double click on Place & Route. This will bring the design through mapping, place and route.
3. Once Place & Route is done, user can double click on Timing Analysis Report to get 
   the timing analysis result.
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HOW TO RUN SIMULATION
1. User can run functional simulation by software modelsim or vcs. 
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