Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\RefDesign\Interface\LPC_Peripheral\Gowin_LPC_Peripheral_RefDesign\project\impl\gwsynthesis\fpga_project.vg
Physical Constraints File ---
Timing Constraints File ---
Version V1.9.8.07
Part Number GW1N-LV9LQ144C6/I5
Device GW1N-9C
Created Time Tue Jul 12 10:18:36 2022
Legal Announcement Copyright (C)2014-2022 Gowin Semiconductor Corporation. All rights reserved.

Power Summary

Power Information:

Total Power (mW) 8.833
Quiescent Power (mW) 8.457
Dynamic Power (mW) 0.376

Thermal Information:

Junction Temperature 25.264
Theta JA 29.000
Max Allowed Ambient Temperature 84.736

Configure Information:

Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125
Use Vectorless Estimation false
Filter Glitches false
Related Vcd File
Related Saif File
Use Custom Theta JA false
Air Flow LFM_0
Heat Sink None
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Ambient Temperature 25.000

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 1.200 0.080 1.948 2.433
VCCX 2.500 0.065 2.424 6.224
VCCO18 1.800 0.065 0.033 0.175

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.015 NA 6.110
IO 0.542 0.183 10.227

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
LPC_Peripheral_Ref 0.015 0.015(0.011)
LPC_Peripheral_Ref/lpc_peri_inst/ 0.011 0.011(0.011)
LPC_Peripheral_Ref/lpc_peri_inst/u_lpc_peri/ 0.011 0.011(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
LCLK 50.000 0.017
NO CLOCK DOMAIN 0.000 0.000