Hierarchy Module Resource
| MODULE NAME | REG NUMBER | ALU NUMBER | LUT NUMBER | DSP NUMBER | BSRAM NUMBER | SSRAM NUMBER |
|---|---|---|---|---|---|---|
| top (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/src/top.v) | - | - | - | - | - | - | |--gw_gao_inst_0 (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/impl/gwsynthesis/RTL_GAO/gw_gao_top.v) | 733 | 10 | 600 | - | 6 | 42 | |--u_deUstb (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/src/top.v) | 23 | 19 | 9 | - | - | - | |--pll_inst (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/src/top.v) | - | - | - | - | - | - | |--u_Gowin_EMPU_M1_Top (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/src/top.v) | 1304 | 43 | 3258 | 1 | 40 | 16 | |--u1_AHB_to_AXI_Bridge_Top (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/src/top.v) | 128 | 4 | 101 | - | - | 18 | |--u_axi4_lite_slave_top (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/src/top.v) | - | - | - | - | - | - | |--axi_ip_slave_v1_0_S00_AXI_inst (D:/IP release/ahb2axi/Gowin_AHB2AXI_bridge_refDesign/project/FPGA/gw_ahb2axi_ref_design_gao/src/axi4_lite_slave_top.v) | 1071 | - | 655 | - | - | - |