Power Messages

Report Title Power Analysis Report
Design File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_Complex_Multiplier_RefDesign\Complex_Multiplier_18\project\impl\gwsynthesis\cmult_18.vg
Physical Constraints File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_Complex_Multiplier_RefDesign\Complex_Multiplier_18\project\src\cmult_18.cst
Timing Constraints File E:\myWork\IP\releaseVerify\version\1.9.11.02\Gowin_Complex_Multiplier_RefDesign\Complex_Multiplier_18\project\src\cmult_18.sdc
Tool Version V1.9.11.02 (64-bit)
Part Number GW5A-LV25UG324ES
Device GW5A-25
Device Version A
Created Time Tue Jun 10 16:11:31 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

Configure Information:

Grade Commercial
Process Typical
Ambient Temperature 25.000
Use Custom Theta JA false
Heat Sink None
Air Flow LFM_0
Use Custom Theta SA false
Board Thermal Model None
Use Custom Theta JB false
Related Vcd File
Related Saif File
Filter Glitches false
Default IO Toggle Rate 0.125
Default Remain Toggle Rate 0.125

Power Summary

Power Information:

Total Power (mW) 88.090
Quiescent Power (mW) 53.557
Dynamic Power (mW) 34.533

Thermal Information:

Junction Temperature 27.414
Theta JA 27.400
Max Allowed Ambient Temperature 82.586

Supply Information:

Voltage Source Voltage Dynamic Current(mA) Quiescent Current(mA) Power(mW)
VCC 0.900 25.611 30.041 50.086
VCCX 3.300 1.740 3.000 15.642
VCCIO33 3.300 1.740 1.036 9.162
VCCLDO 3.300 0.000 4.000 13.200

Power Details

Power By Block Type:

Block Type Total Power(mW) Static Power(mW) Average Toggle Rate(millions of transitions/sec)
Logic 0.144 NA 3.826
IO 32.510 19.464 7.027
BSRAM 18.580 NA NA
DSP 2.763 NA 0.012

Power By Hierarchy:

Hierarchy Entity Total Power(mW) Block Dynamic Power(mW)
top 21.487 21.487(20.122)
top/gw_gao_inst_0/ 17.359 17.359(17.359)
top/gw_gao_inst_0/u_icon_top/ 0.002 0.002(0.000)
top/gw_gao_inst_0/u_la0_top/ 17.357 17.357(17.300)
top/gw_gao_inst_0/u_la0_top/u_ao_crc32/ 0.004 0.004(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_match_0/ 0.005 0.005(0.000)
top/gw_gao_inst_0/u_la0_top/u_ao_mem_ctrl/ 17.292 17.292(0.000)
top/u_complex_mult/ 2.763 2.763(2.763)
top/u_complex_mult/comp_mult_inst/ 2.763 2.763(0.000)

Power By Clock Domain:

Clock Domain Clock Frequency(Mhz) Total Dynamic Power(mW)
clk2 20.000 4.984
clk1 50.000 16.504
NO CLOCK DOMAIN 0.000 0.000