| Project Settings |
|---|
| Project Name | gw_uart_slave | Device Name | rev_1: GOWIN-GW1N : GW1N_4 |
| Implementation Name | rev_1 | Top Module | gw_uart_slave |
| Pipelining | 1 | Retiming | 0 |
| Resource Sharing | 1 | Fanout Guide | 10000 |
| Disable I/O Insertion | 0 | Disable Sequential Optimizations | 0 |
| Clock Conversion | 1 | FSM Compiler | 1 |
| Run Status |
| Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
| (compiler) | Complete |
9 |
1 |
0 |
- |
00m:01s |
- |
2019/9/18 18:28:14 |
| (premap) | Complete |
9 |
5 |
0 |
0m:01s |
0m:01s |
192MB |
2019/9/18 18:28:17 |
| (fpga_mapper) | Complete |
32 |
1 |
0 |
0m:03s |
0m:03s |
194MB |
2019/9/18 18:28:21 |
| Multi-srs Generator |
Complete | | | | | | | 2019/9/18 18:28:15 |
| Area Summary |
|
| I/O ports
(io_port) | 4 |
Non I/O Register bits
(non_io_reg) | 103 (2%) |
| I/O Register bits
(total_io_reg) | 0 |
Block Rams
(v_ram) | 0 (10) |
| Block Multipliers
(dsp_used) | 0 (8) |
LUTs
(total_luts) | 123 (2%) |
| Timing Summary |
|
| Clock Name | Req Freq | Est Freq | Slack |
| gw_uart_slave|SCLK | 173.1 MHz | 147.2 MHz | -1.019 |
| System | 100.0 MHz | 185.9 MHz | 4.622 |
| Optimizations Summary |
| Combined Clock Conversion | 1 / 0 |
| |
|