../project/src/*.v : 
                        test design for SDRAM Controller ip
../project/src/SDRAM_controller_top_SIP/SDRAM_controller_top_SIP.vo :
                        SDRAM Controller IP
../tb/tb.v :
                        testbench for simulation
prim_sim.v:             simulation library, get from installation path of Gowin(for example: installation path\1.8\Pnr\lib\gw2a)
