| Project Settings |
|---|
| Project Name | sdioslave | Device Name | rev_1: GOWIN-GW2A : GW2A_18 |
| Implementation Name | rev_1 | Top Module | [auto] |
| Pipelining | 1 | Retiming | 0 |
| Resource Sharing | 1 | Fanout Guide | 10000 |
| Disable I/O Insertion | 1 | Disable Sequential Optimizations | 0 |
| Clock Conversion | 1 | FSM Compiler | 1 |
| Run Status |
|---|
| Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
| (compiler) | Complete |
8 |
0 |
0 |
- |
00m:08s |
- |
2019/11/11
16:08:09 |
| (premap) | Complete |
5 |
0 |
0 |
0m:03s |
0m:04s |
240MB |
2019/11/11
16:08:17 |
| (fpga_mapper) | Complete |
9 |
758 |
0 |
0m:32s |
0m:34s |
334MB |
2019/11/11
16:08:52 |
| Multi-srs Generator |
Complete | | | | 00m:01s | | | 2019/11/11
16:08:11 |
| Area Summary |
|---|
|
| Non I/O Register bits
(non_io_reg) | 1591 (10%) |
I/O Register bits
(total_io_reg) | 0 |
| Ultra Rams | 0 |
Block Rams
(v_ram) | 0 (46) |
| Block Multipliers
(dsp_used) | 0 (24) |
LUTs
(total_luts) | 3305 (15%) |
| Timing Summary |
|---|
|
| Clock Name | Req Freq | Est Freq | Slack |
|---|
| SDIO_Slave_Controller_Top|clk_2mhz | 369.5 MHz | 314.1 MHz | -0.478 |
| SDIO_Slave_Controller_Top|cpu_clk | 351.0 MHz | 298.4 MHz | -0.503 |
| SDIO_Slave_Controller_Top|sdio_clk | 176.4 MHz | 149.9 MHz | -1.001 |
| System | 150.0 MHz | 220.5 MHz | 2.131 |
| Optimizations Summary |
|---|
| Combined Clock Conversion | 3 / 0 |
| |
|