@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode
@N: CG1350 :	| Running Verilog Compiler in Multiple File Compilation Unit mode
@N: CG364 :"D:\Gowin\sdio_sweg\IDE\ipcore\SDIOSlaveController\data\sdio_slave_controller_top.v":5:19:5:19|Synthesizing module SDIO_Slave_Controller_Top in library work.
@N|Running in 64-bit mode
@N: NF107 :"d:\gowin\sdio_sweg\ide\ipcore\sdioslavecontroller\data\sdio_slave_controller_top.v":5:19:5:19|Selected library: work cell: SDIO_Slave_Controller_Top view verilog as top level
@N: NF107 :"d:\gowin\sdio_sweg\ide\ipcore\sdioslavecontroller\data\sdio_slave_controller_top.v":5:19:5:19|Selected library: work cell: SDIO_Slave_Controller_Top view verilog as top level

