#### START OF AREA REPORT #####[
Part: GW2A_18PBGA256-8 (GoWin)
Click here to go to specific block report:
SDIO_Slave_Controller_Top
Üþsdio_slave_ctrl®SDIO_Slave_Controller_Top
Üþsdio_if®SDIO_Slave_Controller_Top
Üþcmd_dec®SDIO_Slave_Controller_Top
Üþsdio_biu®SDIO_Slave_Controller_Top
Üþcard_fixed_regs®SDIO_Slave_Controller_Top _16744448_0_1_2_3_4_5
Üþcrc7_chk®SDIO_Slave_Controller_Top
Üþresp_gen®SDIO_Slave_Controller_Top _Z1
Üþresp_conv®SDIO_Slave_Controller_Top
Üþfn0_reg®SDIO_Slave_Controller_Top
Üþslv_cpu_if®SDIO_Slave_Controller_Top _3_5_4
Üþcmd53_ctrl®SDIO_Slave_Controller_Top
Üþcmd53_tx_rx®SDIO_Slave_Controller_Top
Üþcrc16_gen®SDIO_Slave_Controller_Top
Üþcrc16_gen®SDIO_Slave_Controller_Top _3
Üþcrc16_gen®SDIO_Slave_Controller_Top _4
Üþcrc16_gen®SDIO_Slave_Controller_Top _5
Üþcis_fnx_if®SDIO_Slave_Controller_Top
Üþirq_gen®SDIO_Slave_Controller_Top
Üþcmd19_tx®SDIO_Slave_Controller_Top
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######## Utilization report for Top level view: SDIO_Slave_Controller_Top ########
=========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 1591 100 %
======================================================
Total SEQUENTIAL ELEMENTS in the block SDIO_Slave_Controller_Top: 1591 (29.08 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
LUTS 3305 100 %
MUX2_LUT5 203 100 %
MUX2_LUT6 58 100 %
MUX2_LUT7 16 100 %
ALU 275 100 %
======================================================
Total COMBINATIONAL LOGIC in the block SDIO_Slave_Controller_Top: 3857 (70.50 % Utilization)
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######## Utilization report for cell: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ ########
Instance path: SDIO_Slave_Controller_Top.\\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\
======================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 1591 100 %
======================================================
Total SEQUENTIAL ELEMENTS in the block SDIO_Slave_Controller_Top.\\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ : 1591 (29.08 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
LUTS 3305 100 %
MUX2_LUT5 203 100 %
MUX2_LUT6 58 100 %
MUX2_LUT7 16 100 %
ALU 275 100 %
======================================================
Total COMBINATIONAL LOGIC in the block SDIO_Slave_Controller_Top.\\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ : 3857 (70.50 % Utilization)
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######## Utilization report for cell: \\\~card_fixed_regs\.SDIO_Slave_Controller_Top\ _16744448_0_1_2_3_4_5 ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~card_fixed_regs\.SDIO_Slave_Controller_Top\ _16744448_0_1_2_3_4_5
=======================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 22 1.38 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~card_fixed_regs\.SDIO_Slave_Controller_Top\ _16744448_0_1_2_3_4_5: 22 (0.40 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 29 0.8770 %
ALU 16 5.82 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~card_fixed_regs\.SDIO_Slave_Controller_Top\ _16744448_0_1_2_3_4_5: 45 (0.82 % Utilization)
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######## Utilization report for cell: \\\~cis_fnx_if\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cis_fnx_if\.SDIO_Slave_Controller_Top\
=============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 25 1.57 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cis_fnx_if\.SDIO_Slave_Controller_Top\ : 25 (0.46 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 34 1.03 %
ALU 34 12.4 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cis_fnx_if\.SDIO_Slave_Controller_Top\ : 68 (1.24 % Utilization)
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######## Utilization report for cell: \\\~cmd19_tx\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd19_tx\.SDIO_Slave_Controller_Top\
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 14 0.880 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd19_tx\.SDIO_Slave_Controller_Top\ : 14 (0.26 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 16 0.4840 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd19_tx\.SDIO_Slave_Controller_Top\ : 16 (0.29 % Utilization)
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######## Utilization report for cell: \\\~cmd53_ctrl\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd53_ctrl\.SDIO_Slave_Controller_Top\
=============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 129 8.11 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd53_ctrl\.SDIO_Slave_Controller_Top\ : 129 (2.36 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 242 7.32 %
ALU 39 14.2 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd53_ctrl\.SDIO_Slave_Controller_Top\ : 281 (5.14 % Utilization)
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######## Utilization report for cell: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\
==============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 212 13.3 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ : 212 (3.87 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 367 11.1 %
ALU 42 15.3 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ : 409 (7.48 % Utilization)
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######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\
========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 16 1.01 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ : 16 (0.29 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 20 0.6050 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ : 20 (0.37 % Utilization)
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######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top\ _3 ########
Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _3
==========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 16 1.01 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _3: 16 (0.29 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 17 0.5140 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _3: 17 (0.31 % Utilization)
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######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top\ _4 ########
Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _4
==========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 16 1.01 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _4: 16 (0.29 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 17 0.5140 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _4: 17 (0.31 % Utilization)
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######## Utilization report for cell: \\\~crc16_gen\.SDIO_Slave_Controller_Top\ _5 ########
Instance path: \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _5
==========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 16 1.01 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _5: 16 (0.29 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 17 0.5140 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~cmd53_tx_rx\.SDIO_Slave_Controller_Top\ .\\\~crc16_gen\.SDIO_Slave_Controller_Top\ _5: 17 (0.31 % Utilization)
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######## Utilization report for cell: \\\~cmd_dec\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd_dec\.SDIO_Slave_Controller_Top\
==========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 233 14.6 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd_dec\.SDIO_Slave_Controller_Top\ : 233 (4.26 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
LUTS 273 8.26 %
MUX2_LUT5 3 1.48 %
ALU 58 21.1 %
======================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~cmd_dec\.SDIO_Slave_Controller_Top\ : 334 (6.10 % Utilization)
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######## Utilization report for cell: \\\~crc7_chk\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~crc7_chk\.SDIO_Slave_Controller_Top\
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 7 0.440 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~crc7_chk\.SDIO_Slave_Controller_Top\ : 7 (0.13 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 14 0.4240 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~crc7_chk\.SDIO_Slave_Controller_Top\ : 14 (0.26 % Utilization)
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######## Utilization report for cell: \\\~fn0_reg\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~fn0_reg\.SDIO_Slave_Controller_Top\
==========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 549 34.5 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~fn0_reg\.SDIO_Slave_Controller_Top\ : 549 (10.03 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
LUTS 1398 42.3 %
MUX2_LUT5 143 70.4 %
MUX2_LUT6 52 89.7 %
MUX2_LUT7 16 100 %
ALU 47 17.1 %
======================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~fn0_reg\.SDIO_Slave_Controller_Top\ : 1656 (30.27 % Utilization)
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######## Utilization report for cell: \\\~irq_gen\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~irq_gen\.SDIO_Slave_Controller_Top\
==========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 24 1.51 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~irq_gen\.SDIO_Slave_Controller_Top\ : 24 (0.44 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 37 1.12 %
ALU 7 2.55 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~irq_gen\.SDIO_Slave_Controller_Top\ : 44 (0.80 % Utilization)
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######## Utilization report for cell: \\\~resp_conv\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~resp_conv\.SDIO_Slave_Controller_Top\
============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 20 1.26 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~resp_conv\.SDIO_Slave_Controller_Top\ : 20 (0.37 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 33 0.9980 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~resp_conv\.SDIO_Slave_Controller_Top\ : 33 (0.60 % Utilization)
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######## Utilization report for cell: \\\~resp_gen\.SDIO_Slave_Controller_Top\ _Z1 ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~resp_gen\.SDIO_Slave_Controller_Top\ _Z1
==============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 104 6.54 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~resp_gen\.SDIO_Slave_Controller_Top\ _Z1: 104 (1.90 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
LUTS 228 6.9 %
MUX2_LUT5 15 7.39 %
======================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~resp_gen\.SDIO_Slave_Controller_Top\ _Z1: 243 (4.44 % Utilization)
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######## Utilization report for cell: \\\~sdio_biu\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~sdio_biu\.SDIO_Slave_Controller_Top\
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 48 3.02 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~sdio_biu\.SDIO_Slave_Controller_Top\ : 48 (0.88 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
LUTS 110 3.33 %
MUX2_LUT5 2 0.9850 %
MUX2_LUT6 1 1.72 %
ALU 32 11.6 %
======================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~sdio_biu\.SDIO_Slave_Controller_Top\ : 145 (2.65 % Utilization)
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######## Utilization report for cell: \\\~sdio_if\.SDIO_Slave_Controller_Top\ ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~sdio_if\.SDIO_Slave_Controller_Top\
==========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 15 0.9430 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~sdio_if\.SDIO_Slave_Controller_Top\ : 15 (0.27 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
LUTS 60 1.82 %
=================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~sdio_if\.SDIO_Slave_Controller_Top\ : 60 (1.10 % Utilization)
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######## Utilization report for cell: \\\~slv_cpu_if\.SDIO_Slave_Controller_Top\ _3_5_4 ########
Instance path: \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~slv_cpu_if\.SDIO_Slave_Controller_Top\ _3_5_4
===================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 189 11.9 %
======================================================
Total SEQUENTIAL ELEMENTS in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~slv_cpu_if\.SDIO_Slave_Controller_Top\ _3_5_4: 189 (3.45 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
LUTS 462 14 %
MUX2_LUT5 40 19.7 %
MUX2_LUT6 5 8.62 %
======================================================
Total COMBINATIONAL LOGIC in the block \\\~sdio_slave_ctrl\.SDIO_Slave_Controller_Top\ .\\\~slv_cpu_if\.SDIO_Slave_Controller_Top\ _3_5_4: 507 (9.27 % Utilization)
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##### END OF AREA REPORT #####]