Pin Messages

Report Title Pin Report
Design File E:\myWork\IP\releaseVerify\RefDesign\Memory_Control\DDR3\Gowin_DDR3_Memory_Interface_RefDesign\DDR3_MC_PHY_1vs4_5a138k\project\impl\gwsynthesis\ddr3_1v4_hs.vg
Physical Constraints File E:\myWork\IP\releaseVerify\RefDesign\Memory_Control\DDR3\Gowin_DDR3_Memory_Interface_RefDesign\DDR3_MC_PHY_1vs4_5a138k\project\src\ddr3_1v4_hs.cst
Timing Constraints File E:\myWork\IP\releaseVerify\RefDesign\Memory_Control\DDR3\Gowin_DDR3_Memory_Interface_RefDesign\DDR3_MC_PHY_1vs4_5a138k\project\src\ddr3_1v4_hs.sdc
Tool Version V1.9.11.01 (64-bit)
Part Number GW5AST-LV138FPG676AES
Device GW5AST-138
Device Version B
Created Time Fri Feb 28 16:51:51 2025
Legal Announcement Copyright (C)2014-2025 Gowin Semiconductor Corporation. All rights reserved.

Pin Details

Pinout by Port Name:

Port Name Diff Pair Loc./Bank Constraint Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor BankVccio Pull Strength Ctle
clk - P16/3 Y in IOR103[B] EMCCLK LVCMOS33 OFF NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
error - R20/3 Y out IOR69[A] D28 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
error1 - N21/3 Y out IOR80[A] MGCLKT_3/RPLL2_T_FB1/RPLL3_T_FB1 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
led - N22/3 Y out IOR80[B] MGCLKC_3/RPLL2_C_FB1/RPLL3_C_FB1 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
init_calib_complete - P20/3 Y out IOR78[A] SGCLKT_3/RPLL2_T_FB0/RPLL3_T_FB0 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
ddr_addr[0] - N1/7 Y out IOL35[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[1] - R1/7 Y out IOL22[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[2] - R2/7 Y out IOL17[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[3] - N2/7 Y out IOL29[B] MGCLKC_10/LPLL0_C_FB1/LPLL1_C_FB1 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[4] - P1/7 Y out IOL22[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[5] - T2/7 Y out IOL17[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[6] - N4/7 Y out IOL26[B] SGCLKC_11/LPLL0_C_IN0/LPLL1_C_IN0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[7] - U1/7 Y out IOL15[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[8] - T4/7 Y out IOL20[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[9] - T3/7 Y out IOL20[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[10] - M1/7 Y out IOL35[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[11] - P4/7 Y out IOL26[A] SGCLKT_11/LPLL0_T_IN0/LPLL1_T_IN0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[12] - N3/7 Y out IOL29[A] MGCLKT_10/LPLL0_T_FB1/LPLL1_T_FB1 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_addr[13] - U2/7 Y out IOL15[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_bank[0] - M4/7 Y out IOL49[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_bank[1] - L5/7 Y out IOL47[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_bank[2] - K3/7 Y out IOL51[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_cs - L4/7 Y out IOL49[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_ras - H2/7 Y out IOL40[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_cas - H1/7 Y out IOL40[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_we - J3/7 Y out IOL51[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_ck ddr_ck_n M2,L2/7 Y out IOL31 SGCLKT_10/LPLL0_T_FB0/LPLL1_T_FB0 SSTL15D 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_cke - L3/7 Y out IOL38[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_odt - J1/7 Y out IOL33[B] CLKTEST_L0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_reset_n - N8/7 Y out IOL55[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_dm[0] - F4/6 Y out IOL78[B] SGCLKC_8/LPLL2_C_IN0/LPLL3_C_IN0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_dm[1] - H9/6 Y out IOL107[A] MCKTEST SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_dm[2] - E3/6 Y out IOL89[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_dm[3] - A3/6 Y out IOL67[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
ddr_dq[0] - G4/6 Y io IOL78[A] SGCLKT_8/LPLL2_T_IN0/LPLL3_T_IN0 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[1] - J6/6 Y io IOL74[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[2] - L8/6 Y io IOL76[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[3] - G5/6 Y io IOL80[A] MGCLKT_8/LPLL2_T_IN1/LPLL3_T_IN1 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[4] - K7/6 Y io IOL71[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[5] - J5/6 Y io IOL74[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[6] - K8/6 Y io IOL76[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[7] - K6/6 Y io IOL71[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[8] - E6/6 Y io IOL101[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[9] - H8/6 Y io IOL103[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[10] - H6/6 Y io IOL98[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[11] - G8/6 Y io IOL103[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[12] - D6/6 Y io IOL101[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[13] - F8/6 Y io IOL105[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[14] - G6/6 Y io IOL98[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[15] - F7/6 Y io IOL105[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[16] - C4/6 Y io IOL85[B] SGCLKC_9/LPLL2_C_FB0/LPLL3_C_FB0 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[17] - F3/6 Y io IOL89[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[18] - B4/6 Y io IOL87[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[19] - E5/6 Y io IOL83[A] MGCLKT_9/LPLL2_T_FB1/LPLL3_T_FB1 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[20] - D3/6 Y io IOL92[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[21] - D5/6 Y io IOL83[B] MGCLKC_9/LPLL2_C_FB1/LPLL3_C_FB1 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[22] - A4/6 Y io IOL87[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[23] - D4/6 Y io IOL85[A] SGCLKT_9/LPLL2_T_FB0/LPLL3_T_FB0 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[24] - E1/6 Y io IOL62[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[25] - A2/6 Y io IOL67[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[26] - G2/6 Y io IOL56[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[27] - C2/6 Y io IOL60[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[28] - F2/6 Y io IOL58[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[29] - E2/6 Y io IOL58[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[30] - G1/6 Y io IOL56[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dq[31] - D1/6 Y io IOL62[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
ddr_dqs[0] ddr_dqs_n[0] J4,H4/6 Y io IOL69 - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
ddr_dqs[1] ddr_dqs_n[1] H7,G7/6 Y io IOL96 - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
ddr_dqs[2] ddr_dqs_n[2] B5,A5/6 Y io IOL94 - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
ddr_dqs[3] ddr_dqs_n[3] C1,B1/6 Y io IOL65 - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF

All Package Pins:

Loc./Bank Signal Dir. Site CFG IO Type Drive Pull Mode PCI Clamp Hysteresis Open Drain Vref Single Resistor Diff Resistor Bank Vccio Pull Strength Ctle
E22/5 - in IOB37[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D23/5 - in IOB38[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D24/5 - in IOB38[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C24/5 - in IOB40[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B24/5 - in IOB40[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A23/5 - in IOB42[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A24/5 - in IOB42[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B25/5 - in IOB44[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A25/5 - in IOB44[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C26/5 - in IOB47[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B26/5 - in IOB47[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C22/5 - in IOB49[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C23/5 - in IOB49[B] VREF LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C17/5 - in IOB51[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B17/5 - in IOB51[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E16/5 - in IOB53[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D16/5 - in IOB53[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A17/5 - in IOB56[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A18/5 - in IOB56[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B19/5 - in IOB58[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A19/5 - in IOB58[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E17/5 - in IOB60[A] SGCLKT_6/BPLL0_T_IN0/BPLL1_T_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E18/5 - in IOB60[B] SGCLKC_6/BPLL0_C_IN0/BPLL1_C_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D18/5 - in IOB62[A] MGCLKT_6/BPLL0_T_IN1/BPLL1_T_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C18/5 - in IOB62[B] MGCLKC_6/BPLL0_C_IN1/BPLL1_C_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D19/5 - in IOB66[A] MGCLKT_7/BPLL0_T_FB0/BPLL1_T_FB0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C19/5 - in IOB66[B] MGCLKC_7/BPLL0_C_FB0/BPLL1_C_FB0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E20/5 - in IOB68[A] SGCLKT_7/BPLL0_T_FB1/BPLL1_T_FB1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D20/5 - in IOB68[B] SGCLKC_7/BPLL0_C_FB1/BPLL1_C_FB1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B20/5 - in IOB70[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A20/5 - in IOB70[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
C21/5 - in IOB72[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B21/5 - in IOB72[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
B22/5 - in IOB74[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
A22/5 - in IOB74[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E21/5 - in IOB76[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D21/5 - in IOB76[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G15/5 - in IOB78[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F15/5 - in IOB78[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G17/5 - in IOB80[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F17/5 - in IOB80[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H14/5 - in IOB83[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H15/5 - in IOB83[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H16/5 - in IOB85[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G16/5 - in IOB85[B] VREF LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G19/5 - in IOB87[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F20/5 - in IOB87[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F18/5 - in IOB89[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F19/5 - in IOB89[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H17/5 - in IOB91[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L19/4 - in IOB92[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M14/4 - in IOB93[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L14/4 - in IOB93[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M15/4 - in IOB95[A] ADCINCK1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L15/4 - in IOB95[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J14/4 - in IOB97[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J15/4 - in IOB97[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K15/4 - in IOB99[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J16/4 - in IOB99[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M16/4 - in IOB102[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M17/4 - in IOB102[B] VREF LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K16/4 - in IOB104[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K17/4 - in IOB104[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K22/4 - in IOB106[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K23/4 - in IOB106[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F23/4 - in IOB108[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E23/4 - in IOB108[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G22/4 - in IOB110[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F22/4 - in IOB110[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J24/4 - in IOB112[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H24/4 - in IOB112[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J23/4 - in IOB114[A] SGCLKT_4/BPLL2_T_FB1/BPLL3_T_FB1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H23/4 - in IOB114[B] SGCLKC_4/BPLL2_C_FB1/BPLL3_C_FB1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H21/4 - in IOB116[A] MGCLKT_4/BPLL2_T_FB0/BPLL3_T_FB0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H22/4 - in IOB116[B] MGCLKC_4/BPLL2_C_FB0/BPLL3_C_FB0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G20/4 - in IOB120[A] SGCLKT_5/BPLL2_T_IN0/BPLL3_T_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G21/4 - in IOB120[B] SGCLKC_5/BPLL2_C_IN0/BPLL3_C_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K21/4 - in IOB122[A] MGCLKT_5/BPLL2_T_IN1/BPLL3_T_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J21/4 - in IOB122[B] MGCLKC_5/BPLL2_C_IN1/BPLL3_C_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L17/4 - in IOB124[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L18/4 - in IOB124[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J19/4 - in IOB126[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H19/4 - in IOB126[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J18/4 - in IOB129[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H18/4 - in IOB129[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K20/4 - in IOB131[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J20/4 - in IOB131[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E25/4 - in IOB133[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D25/4 - in IOB133[B] VREF LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
E26/4 - in IOB135[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
D26/4 - in IOB135[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H26/4 - in IOB138[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G26/4 - in IOB138[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G24/4 - in IOB140[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F24/4 - in IOB140[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J25/4 - in IOB142[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J26/4 - in IOB142[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
G25/4 - in IOB144[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
F25/4 - in IOB144[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K18/4 - in IOB146[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
J10/10 - out IOB169[A] TDO LVCMOS33 8 UP OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
H11/10 - in IOB169[B] TMS LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V11/10 - in IOB171[A] READY LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W10/10 - in IOB171[B] DONE LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H12/10 - in IOB173[A] TCK LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H10/10 - in IOB173[B] TDI LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AB7/10 - in IOB175[A] MODE0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
H13/10 - in IOB175[B] CCLK LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
Y9/10 - in IOB177[A] MODE1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W9/10 - in IOB177[B] MODE2 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AB15/10 - in IOB179[A] CFGBVS LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AE16/10 - in IOB179[B] RECONFIG_N LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U4/7 - in IOL1[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
T8/7 - in IOL2[A] ADCINCK0 LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
T7/7 - in IOL2[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
U6/7 - in IOL4[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
U5/7 - in IOL4[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
T5/7 - in IOL6[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
R5/7 - in IOL6[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
R7/7 - in IOL8[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
R6/7 - in IOL8[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
P6/7 - in IOL11[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
P5/7 - in IOL11[B] VREF LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
R8/7 - in IOL13[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
P8/7 - in IOL13[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
U2/7 ddr_addr[13] out IOL15[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
U1/7 ddr_addr[7] out IOL15[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
T2/7 ddr_addr[5] out IOL17[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
R2/7 ddr_addr[2] out IOL17[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
T4/7 ddr_addr[8] out IOL20[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
T3/7 ddr_addr[9] out IOL20[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
R1/7 ddr_addr[1] out IOL22[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
P1/7 ddr_addr[4] out IOL22[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
R3/7 - in IOL24[A] MGCLKT_11/LPLL0_T_IN1/LPLL1_T_IN1 LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
P3/7 - in IOL24[B] MGCLKC_11/LPLL0_C_IN1/LPLL1_C_IN1 LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
P4/7 ddr_addr[11] out IOL26[A] SGCLKT_11/LPLL0_T_IN0/LPLL1_T_IN0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
N4/7 ddr_addr[6] out IOL26[B] SGCLKC_11/LPLL0_C_IN0/LPLL1_C_IN0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
N3/7 ddr_addr[12] out IOL29[A] MGCLKT_10/LPLL0_T_FB1/LPLL1_T_FB1 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
N2/7 ddr_addr[3] out IOL29[B] MGCLKC_10/LPLL0_C_FB1/LPLL1_C_FB1 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
M2/7 ddr_ck out IOL31[A] SGCLKT_10/LPLL0_T_FB0/LPLL1_T_FB0 SSTL15D 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
L2/7 ddr_ck_n out IOL31[B] SGCLKC_10/LPLL0_C_FB0/LPLL1_C_FB0 SSTL15D 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
K1/7 - in IOL33[A] FBTEST_L0 LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
J1/7 ddr_odt out IOL33[B] CLKTEST_L0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
N1/7 ddr_addr[0] out IOL35[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
M1/7 ddr_addr[10] out IOL35[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
L3/7 ddr_cke out IOL38[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
K2/7 - in IOL38[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
H2/7 ddr_ras out IOL40[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
H1/7 ddr_cas out IOL40[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
N7/7 - in IOL42[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
N6/7 - in IOL42[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
M6/7 - in IOL44[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
M5/7 - in IOL44[B] VREF LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
L5/7 ddr_bank[1] out IOL47[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
K5/7 - in IOL47[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
M4/7 ddr_bank[0] out IOL49[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
L4/7 ddr_cs out IOL49[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
K3/7 ddr_bank[2] out IOL51[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
J3/7 ddr_we out IOL51[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
M7/7 - in IOL53[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
L7/7 - in IOL53[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
N8/7 ddr_reset_n out IOL55[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
G2/6 ddr_dq[26] io IOL56[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
G1/6 ddr_dq[30] io IOL56[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
F2/6 ddr_dq[28] io IOL58[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
E2/6 ddr_dq[29] io IOL58[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
C2/6 ddr_dq[27] io IOL60[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
B2/6 - in IOL60[B] VREF LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
E1/6 ddr_dq[24] io IOL62[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
D1/6 ddr_dq[31] io IOL62[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
C1/6 ddr_dqs[3] io IOL65[A] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
B1/6 ddr_dqs_n[3] io IOL65[B] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
A3/6 ddr_dm[3] out IOL67[A] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
A2/6 ddr_dq[25] io IOL67[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
J4/6 ddr_dqs[0] io IOL69[A] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
H4/6 ddr_dqs_n[0] io IOL69[B] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
K7/6 ddr_dq[4] io IOL71[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
K6/6 ddr_dq[7] io IOL71[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
H3/6 - in IOL73[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
J6/6 ddr_dq[1] io IOL74[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
J5/6 ddr_dq[5] io IOL74[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
L8/6 ddr_dq[2] io IOL76[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
K8/6 ddr_dq[6] io IOL76[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
G4/6 ddr_dq[0] io IOL78[A] SGCLKT_8/LPLL2_T_IN0/LPLL3_T_IN0 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
F4/6 ddr_dm[0] out IOL78[B] SGCLKC_8/LPLL2_C_IN0/LPLL3_C_IN0 SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
G5/6 ddr_dq[3] io IOL80[A] MGCLKT_8/LPLL2_T_IN1/LPLL3_T_IN1 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
F5/6 - in IOL80[B] MGCLKC_8/LPLL2_C_IN1/LPLL3_C_IN1 LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
E5/6 ddr_dq[19] io IOL83[A] MGCLKT_9/LPLL2_T_FB1/LPLL3_T_FB1 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
D5/6 ddr_dq[21] io IOL83[B] MGCLKC_9/LPLL2_C_FB1/LPLL3_C_FB1 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
D4/6 ddr_dq[23] io IOL85[A] SGCLKT_9/LPLL2_T_FB0/LPLL3_T_FB0 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
C4/6 ddr_dq[16] io IOL85[B] SGCLKC_9/LPLL2_C_FB0/LPLL3_C_FB0 SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
B4/6 ddr_dq[18] io IOL87[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
A4/6 ddr_dq[22] io IOL87[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
F3/6 ddr_dq[17] io IOL89[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
E3/6 ddr_dm[2] out IOL89[B] - SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
D3/6 ddr_dq[20] io IOL92[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
C3/6 - in IOL92[B] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
B5/6 ddr_dqs[2] io IOL94[A] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
A5/6 ddr_dqs_n[2] io IOL94[B] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
H7/6 ddr_dqs[1] io IOL96[A] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
G7/6 ddr_dqs_n[1] io IOL96[B] - SSTL15D 8 NONE OFF NONE OFF OFF OFF ON 1.5 MEDIUM OFF
H6/6 ddr_dq[10] io IOL98[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
G6/6 ddr_dq[14] io IOL98[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
E6/6 ddr_dq[8] io IOL101[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
D6/6 ddr_dq[12] io IOL101[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
H8/6 ddr_dq[9] io IOL103[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
G8/6 ddr_dq[11] io IOL103[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
F8/6 ddr_dq[13] io IOL105[A] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
F7/6 ddr_dq[15] io IOL105[B] - SSTL15 8 NONE OFF NONE OFF INTERNAL OFF OFF 1.5 MEDIUM OFF
H9/6 ddr_dm[1] out IOL107[A] MCKTEST SSTL15 8 NONE OFF OFF OFF OFF OFF OFF 1.5 MEDIUM NONE
G9/6 - in IOL107[B] VREF LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
J8/6 - in IOL109[A] - LVCMOS15 8 UP OFF ON OFF OFF OFF OFF 1.5 MEDIUM NONE
U17/2 - in IOR1[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V16/2 - in IOR2[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V17/2 - in IOR2[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V18/2 - in IOR4[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W18/2 - in IOR4[B] VREF LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U15/2 - in IOR6[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U16/2 - in IOR6[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T17/2 - in IOR8[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T18/2 - in IOR8[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U14/2 - in IOR11[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V14/2 - in IOR11[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T14/2 - in IOR13[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T15/2 - in IOR13[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V19/2 - in IOR15[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W19/2 - in IOR15[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W20/2 - in IOR17[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
Y20/2 - in IOR17[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T20/2 - in IOR20[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U20/2 - in IOR20[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T19/2 - in IOR22[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U19/2 - in IOR22[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W21/2 - in IOR24[A] SGCLKT_1/RPLL0_T_FB0/RPLL1_T_FB0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
Y21/2 - in IOR24[B] SGCLKC_1/RPLL0_C_FB0/RPLL1_C_FB0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U21/2 - in IOR26[A] MGCLKT_1/RPLL0_T_FB1/RPLL1_T_FB1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V21/2 - in IOR26[B] MGCLKC_1/RPLL0_C_FB1/RPLL1_C_FB1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
Y22/2 - in IOR29[A] SGCLKT_0/RPLL0_T_IN0/RPLL1_T_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
Y23/2 - in IOR29[B] SGCLKC_0/RPLL0_C_IN0/RPLL1_C_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U22/2 - in IOR31[A] MGCLKT_0/RPLL0_T_IN1/RPLL1_T_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V22/2 - in IOR31[B] MGCLKC_0/RPLL0_C_IN1/RPLL1_C_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AA22/2 - in IOR33[A] FBTEST_R0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AA23/2 - in IOR33[B] CLKTEST_R0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AB24/2 - in IOR35[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AC24/2 - in IOR35[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V23/2 - in IOR38[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W23/2 - in IOR38[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AA24/2 - in IOR40[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AB25/2 - in IOR40[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
Y25/2 - in IOR42[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AA25/2 - in IOR42[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AB26/2 - in IOR44[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
AC26/2 - in IOR44[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V24/2 - in IOR47[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W24/2 - in IOR47[B] VREF LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W25/2 - in IOR49[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
Y26/2 - in IOR49[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
V26/2 - in IOR51[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
W26/2 - in IOR51[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U25/2 - in IOR53[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U26/2 - in IOR53[B] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
U24/2 - in IOR55[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T22/3 - in IOR56[A] D19 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R22/3 - in IOR56[B] D18 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T24/3 - in IOR58[A] CLKHOLD_N LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T25/3 - in IOR58[B] D22 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R25/3 - in IOR60[A] D26 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P25/3 - in IOR60[B] D25/VREF LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
T23/3 - in IOR62[A] D17 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R23/3 - in IOR62[B] D16 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R26/3 - in IOR65[A] D21 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P26/3 - in IOR65[B] D20 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N26/3 - in IOR67[A] D24 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M26/3 - in IOR67[B] D23 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R20/3 error out IOR69[A] D28 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
R21/3 - in IOR69[B] D27 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P19/3 - in IOR71[A] CSI_B LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N19/3 - in IOR71[B] D31 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R18/3 - in IOR73[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P23/3 - in IOR74[A] D30 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P24/3 - in IOR74[B] D29 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N23/3 - in IOR76[A] RDWR LVCMOS33 8 DOWN OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N24/3 - out IOR76[B] DOUT_CSO_B LVCMOS33 8 UP OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
P20/3 init_calib_complete out IOR78[A] SGCLKT_3/RPLL2_T_FB0/RPLL3_T_FB0 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
P21/3 - in IOR78[B] SGCLKC_3/RPLL2_C_FB0/RPLL3_C_FB0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N21/3 error1 out IOR80[A] MGCLKT_3/RPLL2_T_FB1/RPLL3_T_FB1 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
N22/3 led out IOR80[B] MGCLKC_3/RPLL2_C_FB1/RPLL3_C_FB1 LVCMOS33 8 NONE OFF OFF OFF OFF OFF OFF 3.3 MEDIUM NONE
M21/3 - in IOR83[A] MGCLKT_2/RPLL2_T_IN1/RPLL3_T_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M22/3 - in IOR83[B] MGCLKC_2/RPLL2_C_IN1/RPLL3_C_IN1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L22/3 - in IOR85[A] SGCLKT_2/RPLL2_T_IN0/RPLL3_T_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L23/3 - in IOR85[B] SGCLKC_2/RPLL2_C_IN0/RPLL3_C_IN0 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M24/3 - in IOR87[A] D14 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M25/3 - in IOR87[B] D15 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L24/3 - in IOR89[A] SSPI_CS_N LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L25/3 - in IOR89[B] D13 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M20/3 - in IOR92[A] D11 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
L20/3 - in IOR92[B] D12 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K25/3 - in IOR94[A] D09 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
K26/3 - in IOR94[B] D10 LVCMOS33 8 NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P18/3 - in IOR96[A] MCS_N LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N18/3 - in IOR96[B] D08/VREF/SO LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R16/3 - in IOR98[A] D06/SSPI_CLK LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R17/3 - in IOR98[B] D07/SSPI_WPN LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N16/3 - in IOR101[A] D04 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N17/3 - in IOR101[B] D05/SI LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P15/3 - in IOR103[A] PUDC_B LVCMOS33 8 DOWN OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P16/3 clk in IOR103[B] EMCCLK LVCMOS33 OFF NONE OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R14/3 - in IOR105[A] D00/MOSI LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R15/3 - in IOR105[B] D01/DIN LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
P14/3 - in IOR107[A] D02/ADCINCK1 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
N14/3 - in IOR107[B] D03 LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
M19/3 - in IOR109[A] - LVCMOS33 8 UP OFF ON OFF OFF OFF OFF 3.3 MEDIUM NONE
R11/ADC - in ADCTN - - - - - - - - - - - - -
R12/ADC - in ADCTP - - - - - - - - - - - - -
P11/ADC - in ADCVN - - - - - - - - - - - - -
N12/ADC - in ADCVP - - - - - - - - - - - - -
AA3/MIPI - inout M0_CKN - - - - - - - - - - - - -
Y3/MIPI - inout M0_CKP - - - - - - - - - - - - -
W1/MIPI - inout M0_D0N - - - - - - - - - - - - -
V1/MIPI - inout M0_D0P - - - - - - - - - - - - -
AA2/MIPI - inout M0_D1N - - - - - - - - - - - - -
Y2/MIPI - inout M0_D1P - - - - - - - - - - - - -
W3/MIPI - inout M0_D2N - - - - - - - - - - - - -
V3/MIPI - inout M0_D2P - - - - - - - - - - - - -
W4/MIPI - inout M0_D3N - - - - - - - - - - - - -
V4/MIPI - inout M0_D3P - - - - - - - - - - - - -
AF2/MIPI - inout M1_CKN - - - - - - - - - - - - -
AE2/MIPI - inout M1_CKP - - - - - - - - - - - - -
AC1/MIPI - inout M1_D0N - - - - - - - - - - - - -
AB1/MIPI - inout M1_D0P - - - - - - - - - - - - -
AE1/MIPI - inout M1_D1N - - - - - - - - - - - - -
AD1/MIPI - inout M1_D1P - - - - - - - - - - - - -
AF3/MIPI - inout M1_D2N - - - - - - - - - - - - -
AE3/MIPI - inout M1_D2P - - - - - - - - - - - - -
AF5/MIPI - inout M1_D3N - - - - - - - - - - - - -
AE5/MIPI - inout M1_D3P - - - - - - - - - - - - -
AF15/Q0 - inout Q0_ATEST_O - - - - - - - - - - - - -
C12/Q0 - in Q0_LN0_RXM_I - - - - - - - - - - - - -
D12/Q0 - in Q0_LN0_RXP_I - - - - - - - - - - - - -
C10/Q0 - out Q0_LN0_TXM_O - - - - - - - - - - - - -
D10/Q0 - out Q0_LN0_TXP_O - - - - - - - - - - - - -
C14/Q0 - in Q0_LN1_RXM_I - - - - - - - - - - - - -
D14/Q0 - in Q0_LN1_RXP_I - - - - - - - - - - - - -
C8/Q0 - out Q0_LN1_TXM_O - - - - - - - - - - - - -
D8/Q0 - out Q0_LN1_TXP_O - - - - - - - - - - - - -
A13/Q0 - in Q0_LN2_RXM_I - - - - - - - - - - - - -
B13/Q0 - in Q0_LN2_RXP_I - - - - - - - - - - - - -
A9/Q0 - out Q0_LN2_TXM_O - - - - - - - - - - - - -
B9/Q0 - out Q0_LN2_TXP_O - - - - - - - - - - - - -
A11/Q0 - in Q0_LN3_RXM_I - - - - - - - - - - - - -
B11/Q0 - in Q0_LN3_RXP_I - - - - - - - - - - - - -
A7/Q0 - out Q0_LN3_TXM_O - - - - - - - - - - - - -
B7/Q0 - out Q0_LN3_TXP_O - - - - - - - - - - - - -
E11/Q0 - in Q0_REFCLKM_0 - - - - - - - - - - - - -
E13/Q0 - in Q0_REFCLKM_1 - - - - - - - - - - - - -
F11/Q0 - in Q0_REFCLKP_0 - - - - - - - - - - - - -
F13/Q0 - in Q0_REFCLKP_1 - - - - - - - - - - - - -
AF15/Q1 - inout Q1_ATEST_O - - - - - - - - - - - - -
AD14/Q1 - in Q1_LN0_RXM_I - - - - - - - - - - - - -
AC14/Q1 - in Q1_LN0_RXP_I - - - - - - - - - - - - -
AD8/Q1 - out Q1_LN0_TXM_O - - - - - - - - - - - - -
AC8/Q1 - out Q1_LN0_TXP_O - - - - - - - - - - - - -
AD12/Q1 - in Q1_LN1_RXM_I - - - - - - - - - - - - -
AC12/Q1 - in Q1_LN1_RXP_I - - - - - - - - - - - - -
AD10/Q1 - out Q1_LN1_TXM_O - - - - - - - - - - - - -
AC10/Q1 - out Q1_LN1_TXP_O - - - - - - - - - - - - -
AF13/Q1 - in Q1_LN2_RXM_I - - - - - - - - - - - - -
AE13/Q1 - in Q1_LN2_RXP_I - - - - - - - - - - - - -
AF9/Q1 - out Q1_LN2_TXM_O - - - - - - - - - - - - -
AE9/Q1 - out Q1_LN2_TXP_O - - - - - - - - - - - - -
AF11/Q1 - in Q1_LN3_RXM_I - - - - - - - - - - - - -
AE11/Q1 - in Q1_LN3_RXP_I - - - - - - - - - - - - -
AF7/Q1 - out Q1_LN3_TXM_O - - - - - - - - - - - - -
AE7/Q1 - out Q1_LN3_TXP_O - - - - - - - - - - - - -
AB11/Q1 - in Q1_REFCLKM_0 - - - - - - - - - - - - -
AB13/Q1 - in Q1_REFCLKM_1 - - - - - - - - - - - - -
AA11/Q1 - in Q1_REFCLKP_0 - - - - - - - - - - - - -
AA13/Q1 - in Q1_REFCLKP_1 - - - - - - - - - - - - -