Hierarchy Module Resource
| MODULE NAME | REG NUMBER | ALU NUMBER | LUT NUMBER | DSP NUMBER | BSRAM NUMBER | SSRAM NUMBER |
|---|---|---|---|---|---|---|
| top (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DDR2_Memory_Interface_RefDesign/DDR2_MC_PHY_1vs4_5a25k_new/project/src/top.v) | 35 | 9 | 24 | - | - | - | |--Gowin_PLL_inst (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DDR2_Memory_Interface_RefDesign/DDR2_MC_PHY_1vs4_5a25k_new/project/src/top.v) | - | - | - | - | - | - | |--u_rd (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DDR2_Memory_Interface_RefDesign/DDR2_MC_PHY_1vs4_5a25k_new/project/src/top.v) | 604 | 240 | 232 | - | - | - | |--gw_gao_inst_0 (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DDR2_Memory_Interface_RefDesign/DDR2_MC_PHY_1vs4_5a25k_new/project/impl/gwsynthesis/RTL_GAO/gw_gao_top.v) | 2308 | 13 | 907 | - | 29 | - | |--u_DDR2_TOP (E:/myWork/IP/releaseVerify/version/1.9.9.02/Gowin_DDR2_Memory_Interface_RefDesign/DDR2_MC_PHY_1vs4_5a25k_new/project/src/top.v) | 4939 | 145 | 3696 | - | 24 | - |